DLPU125 june 2023
Grouped under this heading, are six VHDL modules (.vhd) that are used by several of the primary VHDL modules, with multiple instantiations. There are five clock-domain-crossings (CDC) and one clock enable generator.
The CDC modules are wrappers for Xilinx parameterized CDC macros – using these macros simplifies CDC analysis, as Vivado automatically recognizes them as CDC functions.