Design Description

This design shows an ultra-low power amplifier being used to drive a SAR ADC that consumes only nanoWatts of power during operation. This design is intended for collecting sensor data by providing overall system-level power consumption on the order of single-digit microWatts. PIR sensors, gas sensors, and glucose monitors are a few examples of possible implementations of this SAR ADC design. The values in the component selection section can be adjusted to allow for different data throughput rates and different bandwidth amplifiers. Low-Power Sensor Measurements: 3.3V, 1ksps, 12-bit Single-Ended, Dual Supply shows a more sophisticated version of this circuit where the negative supply is connected to a small negative voltage (–0.3V). The single-supply version has degraded performance when the amplifier output is near zero volts. However, in most cases the single-supply configuration is preferred for its simplicity.

Specifications

Design Notes

1. Determine the linear range of the op amp based on common mode, output swing, and linear open loop gain specification. This is covered in the component selection section.
2. Select COG capacitors to minimize distortion.
3. Use 0.1% 20ppm/°C film resistors or better to minimize distortion.
4. The TI Precision Labs – ADCs training video series covers methods for selecting the charge bucket circuit Rfilt and Cfilt. These component values are dependent on the amplifier bandwidth, data converter sampling rate, and data converter design. The values shown here give good settling and AC performance for the amplifier and data converter in this example. If you modify this design you need to select a different RC filter. Refer to the Introduction to SAR ADC Front-End Component Selection training video for an explanation of how to select the RC filter for best settling and AC performance.

Component Selection

1. Select a low-power operational amp:
   • Supply current < 0.5µA
   • Gain bandwidth product > 5kHz (5 times the sampling rate)
   • Unity gain stable
   • For this cookbook, the LPV811 was selected. It has a 450-nA supply current, 8-kHz gain bandwidth product, and is unity gain stable.
2. Find op amp maximum and minimum output for linear operation
   ${\mathrm{V}}_{\mathrm{ee}}+0\mathrm{V}<{\mathrm{V}}_{\mathrm{out}}<{\mathrm{V}}_{\mathrm{dd}}-0.9\mathrm{V} \text{from LPV811 Vcm specification}$
   ${\mathrm{V}}_{\mathrm{ee}}+10\mathrm{mV}<{\mathrm{V}}_{\mathrm{out}}<{\mathrm{V}}_{\mathrm{dd}}-10\mathrm{mV} \text{from LPV811 Vout swing specification}$
   ${\mathrm{V}}_{\mathrm{ee}}+0.3\mathrm{V}<{\mathrm{V}}_{\mathrm{out}}<{\mathrm{V}}_{\mathrm{dd}}-0.3\mathrm{V} \text{from LPV811 Aol linear region specification}$
   $0.3\mathrm{V}<{\mathrm{V}}_{\mathrm{in}}<3.4\mathrm{V} \text{Combined worst case}$
   Note: The linear range of the LPV811 is 300mV above ground. This means to design a system to establish a full linear range from 0V to 3.3V (full-scale range (FSR) of ADS7042), then a negative supply is required. This design shows that full-measured SNR and THD specifications of the ADS7042 are met without using a negative supply voltage. This testing was only at room temperature and for a more robust system; Low-Power Sensor Measurements: 3.3V, 1ksps, 12-bit Single-Ended, Dual Supply shows this design using a negative supply instead of ground.
3. Typical power calculations (at 1ksps) with expected values:
   ${\mathrm{P}}_{\mathrm{AVDD}}={\mathrm{I}}_{\mathrm{AVDD\_Avg}}\times \mathrm{AVDD}=230\mathrm{nA}\times 3.3\mathrm{V}=759\mathrm{nW}$
   ${\mathrm{P}}_{\mathrm{LPV}811}={\mathrm{I}}_{\mathrm{LPV}811}\times ({\mathrm{V}}_{\mathrm{dd}}-{\mathrm{V}}_{\mathrm{ee}})=450\mathrm{nA}\times (4.5\mathrm{V}-0\mathrm{V})=2.025\mathrm{\mu W}$
   ${\mathrm{P}}_{\mathrm{total}}={\mathrm{P}}_{\mathrm{AVDD}}+{\mathrm{P}}_{\mathrm{LPV}811}=759\mathrm{nW}+2.025\mathrm{\mu W}=2.794\mathrm{\mu W}$
4. Typical power calculations (at 1ksps) with measured values:
   ${\mathrm{P}}_{\mathrm{AVDD}}={\mathrm{I}}_{\mathrm{AVDD\_Avg}}\times \mathrm{AVDD}=214\mathrm{nA}\times 3.3\mathrm{V}=709\mathrm{nW}$
   ${\mathrm{P}}_{\mathrm{LPV}811}={\mathrm{I}}_{\mathrm{LPV}811}\times ({\mathrm{V}}_{\mathrm{dd}}-{\mathrm{V}}_{\mathrm{ee}})=431.6\mathrm{nA}\times (4.5\mathrm{V}-0\mathrm{V})=1.942\mathrm{\mu W}$
   ${\mathrm{P}}_{\mathrm{total}}={\mathrm{P}}_{\mathrm{AVDD}}+{\mathrm{P}}_{\mathrm{LPV}811}=709\mathrm{nW}+1.942\mathrm{\mu W}=2.651\mathrm{\mu W}$
5. Find Rfilt and Cfilt to allow for settling at 1ksps. Refine the Rfilt and Cfilt Values (a Precision Labs video) showing the algorithm for selecting Rfilt and Cfilt. The final value of 200kΩ and 510pF proved to settle to well below ½ of a least significant bit (LSB).

DC Transfer Characteristics

The following graph shows a linear output response for inputs from 0 to 3.3V. The FSR of the ADC falls within the linear range of the op amp.

AC Transfer Characteristics

The bandwidth simulation includes the effects of the amplifier output impedance and the RC charge bucket circuit (R_filt and C_filt).The bandwidth of the RC circuit is shown in the following equation to be 1.56kHz. The simulated bandwidth of 2kHz includes effects from the output impedance interacting with the impedance of the load. See TI Video Library - Op Amps: Bandwidth 1 for more details on this subject.

Transient ADC Input Settling Simulation

The following simulation shows settling to a 3-V DC input signal. This type of simulation shows that the sample and hold kickback circuit is properly selected to within ½ of a LSB (402µV). Refer to Introduction to SAR ADC Front-End Component Selection for detailed theory on this subject.

Noise Simulation

This section details a simplified noise calculation for a rough estimate. We neglect resistor noise in this calculation as it is attenuated for frequencies greater than 10kHz.

Note that calculated and simulated match well. Refer to Calculating the Total Noise for ADC Systems for detailed theory on this subject.

Measure FET

This performance was measured on a modified version of the ADS7042EVM-PDK. The AC performance indicates SNR = 70.8dB, THD = –82.7dB, and ENOB (effective number of bits) = 11.43, which matches well with the specified performance of the ADC of SNR = 70dB.

Design Featured Devices

Link to Key Files

Texas Instruments, LPV811 TINA files, software download