SBAA600 October   2024 TAA5212 , TAC5111 , TAC5112 , TAC5211 , TAC5212

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Voice Activity Detection
    1. 2.1 VAD Configurations
      1. 2.1.1 User, Auto, Intermediate
      2. 2.1.2 VAD With ADC Recording
      3. 2.1.3 VAD Monitoring Channel
      4. 2.1.4 VAD Interrupt Pin
      5. 2.1.5 MICBIAS Enable During PDM Monitoring
      6. 2.1.6 VAD Clock Configurabilty
    2. 2.2 VAD Parameters
      1. 2.2.1 Initial Learning Period
      2. 2.2.2 Hold Over Counter
      3. 2.2.3 Wakeup Wait
      4. 2.2.4 Threshold
  6. 3VAD Performance Results
  7. 4Examples
  8. 5Summary
  9. 6References

Hold Over Counter

On detecting voice activity, the VAD algorithm generates an interrupt. If the interrupt is programmed to be active high, then the interrupt goes high (logic 1) on detecting voice and goes low (logic 0) when there is no voice. Before going low, the amount of time the interrupt stays high after the voice activity is determined to have ended is determined by the hold over counter count. Equation 2 shows the computation of the VAD_HOC parameter.

Equation 2. H o l d   o v e r   c o u n t e r   ( s ) =   H O C 10 (   256 ×   8000   )

where

  • HOC10 is the HOC register value in decimal form interpreted as a signed integer

The default value (0x00032000) corresponds to 100ms. Table 2-12 shows the registers that control the VAD_HOC parameter.

Table 2-12 Programmable Coefficient Registers for Hold Over Counter
Coefficient Page Register Reset Value Description
VAD_HOC 0x0E 0x0C 0x00 HOC Byte[31:24]
0x0E 0x0D 0x03 HOC Byte[23:16]
0x0E 0x0E 0x20 HOC Byte[15:8]
0x0E 0x0F 0x00 HOC Byte[7:0]