Powering the PA on and off in a controlled routine is necessary to prevent the PA gate voltage from being too high when PAVDD is applied. If the gate voltage is too high, the PA can operate in saturation mode and cause thermal damage to the PA or the board the PA is mounted on. After the AFE20408 is powered up, the proper start-up sequencing for the PA requires the following steps:
- Power on the AFE20408.
- Set the gate voltage to the appropriate pinch-off voltage to keep the PA off while the PAVDD is applied.
- Enable the PAVDD voltage using the AFE20408 PAON pin and PMOS-NMOS circuit or through external circuitry and signals.
- Now that PAVDD is applied, the gate bias can be increased to set the desired power output of the PA.
- Finally, the RF signal can be enabled. This allows the PA to transmit a signal.
The PA can be safely shut down by reversing the power-on steps:
- Disable the RF signal from the PA.
- Reduce the DAC outputs to the pinch-off value to turn off the PA.
- Disable the PAVDD voltage through external circuitry or the PAON pin.
- Disable the DAC outputs after the PA is fully disabled.
- Turn off the power to the AFE20408.
The following sections detail output behavior during device power-up.