SBAK019 May 2024 ADC3683-SP
SEE testing was performed on an ADC3683-SP device solder down on an ADC3683-SP EVM. For the SEL, the device was powered up to a voltage of 1.9V at approximately 125°C. For the SET characterization, the ADC3683-SP was tested at room temperature at approximately 25°C operating under nominal conditions for power supplies. Three power supplies were used to power AVDD, IOVDD, and the EVM board supply respectively, each using 1.8V.
For SEU events, we monitored the DCLK output signal; DCLK being the clock signal we supply to the FPGA. When the DCLK signal experiences an upset, the data on the data lines is not valid. As DCLK by default is always toggling and outputting a constant and continuous signal, when there is a significant deviation from normal, an event has occurred. To monitor DCLK events, a National Instruments™ (NI) PXIe-5172 scope card connected to USER_LED3 on the TSW1400EVM was used, which goes high when a valid clock from the ADC is not received, which is defined as an event occurring.
The scope was configured to capture events using a rising edge trigger. AVDD and IOVDD currents were also monitored during SEU testing. However, the currents were not used in determining whether an event has occurred. Events were observed and are characterized in . See Section 8.1 for more details.
All equipment was controlled and monitored using a custom-developed LabVIEW™ program (PXI-RadTest) running on a HP-Z4® desktop computer. The computer communicates with the PXI chassis through an MXIExpress cable and a NI PXIe-8381 remote control module. Figure 6-1 shows a block diagram of the setup used for SEE testing of the ADC3683-SP. Table 6-1 lists the connections, limits, and compliance values used during the testing. During the SEL testing, the device was heated to 125°C by using a Closed-Loop PID controlled heat gun (MISTRAL 6 System 120V, 2400W). For SEU testing, the device was tested at room temperature. No cooling or heating was applied to the DUT. Die temperature was verified using a FLIR IR-camera prior to the SEE test campaign.
Name | Equipment Used | Value set |
---|---|---|
AVDD | KeySight E36311 | 1.8V |
IOVDD | KeySight E36311 | 1.8V |
EVM Board Supply | KeySight E36311 | 1.8V |
DCLKIN | R&S SML01 Sig Gen | 292.5MHz |
Channel A | R&S SGS100A | 20MHz |
CLK | R&S SGS100A | 65MHz |
All boards used for SEE testing were fully checked for functionality. Dry runs were also performed to make sure that the test system was stable under all bias and load conditions prior to being taken to the TAMU facility. During the heavy-ion testing, the LabVIEW control program powered up the ADC3683-SP device and set the external sourcing and monitoring functions of the external equipment. After functionality and stability had been confirmed, the beam shutter was opened to expose the device to the heavy-ion beam. The shutter remained open until the target fluence was achieved. (This was determined by external detectors and counters.) During irradiation, the NI scope cards continuously monitored the signals. When the DCLK voltage changes from low to high (using a positive edge trigger), a data capture was initiated. In addition to monitoring the DCLK signal, the AVDD and IOVDD currents were monitored at all times.