at
TA = 25°C, AVDD = 5 V, and DAC loaded with midscale code
(unless otherwise noted)
Figure 7-2 DAC7311 12-Bit Linearity Error and
Differential Linearity Error vs Code (–40°C)
Figure 7-4 DAC7311 12-Bit Linearity Error and
Differential Linearity Error vs Code (25°C)
Figure 7-6 DAC7311 12-Bit Linearity Error and
Differential Linearity Error vs Code (125°C)
Figure 7-8 DAC5311 8-Bit Linearity Error
and Differential Linearity Error vs Code (–40°C)
Figure 7-10 DAC5311 8-Bit Linearity Error
and Differential Linearity Error vs Code (25°C)
Figure 7-12 DAC5311 8-Bit Linearity Error
and Differential Linearity Error vs Code (125°C)
Figure 7-14 Source Current at Positive
Rail
Figure 7-16 Power-Supply Current vs Digital
Input Code 
Figure 7-18 Power-Supply Current vs Temperature 
Figure 7-20 Total Harmonic Distortion vs Output
Frequency 
Figure 7-22 Power Spectral Density
Figure 7-24 DAC Output Noise, 0.1-Hz to
10-Hz Bandwidth
Figure 7-26 Glitch Energy, 5-V, 12-Bit, 1-LSB
Step, Rising Edge
Figure 7-28 Glitch Energy, 5-V, 8-Bit,
1-LSB Step, Rising Edge
Figure 7-30 Full-Scale Settling Time, 5-V
Rising Edge
Figure 7-32 Half-Scale Settling Time, 5-V Rising
Edge
Figure 7-34 Power-On Reset to 0-V Power-On
Glitch
Figure 7-36 Power-Supply Current vs
Power-Supply Voltage 
Figure 7-38 Power-Supply Current
Histogram
Figure 7-3 DAC6311 10-Bit Linearity
Error and Differential Linearity Error vs Code (–40°C)
Figure 7-5 DAC6311 10-Bit Linearity Error
and Differential Linearity Error vs Code (25°C)
Figure 7-7 DAC6311 10-Bit Linearity Error
and Differential Linearity Error vs Code (125°C)
Figure 7-9 Zero-Code Error vs Temperature 
Figure 7-11 Offset Error vs Temperature 
Figure 7-13 Full-Scale Error vs Temperature 
Figure 7-15 Sink Current at Negative
Rail
Figure 7-17 Power-Supply Current vs Logic Input
Voltage 
Figure 7-19 Power-Down Current vs
Temperature 
Figure 7-21 Signal-to-Noise Ratio vs
Output Frequency 
Figure 7-23 DAC Output Noise Density vs
Frequency 
Figure 7-25 Clock Feedthrough, 5-V, 2-MHz,
Midscale
Figure 7-27 Glitch Energy, 5-V, 12-Bit,
1-LSB Step, Falling Edge
Figure 7-29 Glitch Energy, 5-V, 8-Bit, 1-LSB
Step, Falling Edge
Figure 7-31 Full-Scale Settling Time, 5-V
Falling Edge
Figure 7-33 Half-Scale Settling Time 5-V
Falling Edge
Figure 7-35 Power-Off Glitch
Figure 7-37 Power-Down Current vs Power-Supply
Voltage