SBAS444E May   2009  – December 2024 ADS1113 , ADS1114 , ADS1115

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5.   Device Comparison Table
  6. 4 Pin Configuration and Functions
  7. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements: I2C
    7. 5.7 Typical Characteristics
  8. 6 Parameter Measurement Information
    1. 6.1 Noise Performance
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
      1. 7.3.1 Multiplexer
      2. 7.3.2 Analog Inputs
      3. 7.3.3 Full-Scale Range (FSR) and LSB Size
      4. 7.3.4 Voltage Reference
      5. 7.3.5 Oscillator
      6. 7.3.6 Output Data Rate and Conversion Time
      7. 7.3.7 Digital Comparator (ADS1114 and ADS1115 Only)
      8. 7.3.8 Conversion Ready Pin (ADS1114 and ADS1115 Only)
      9. 7.3.9 SMbus Alert Response
    4. 7.4 Device Functional Modes
      1. 7.4.1 Reset and Power-Up
      2. 7.4.2 Operating Modes
        1. 7.4.2.1 Single-Shot Mode
        2. 7.4.2.2 Continuous-Conversion Mode
      3. 7.4.3 Duty Cycling For Low Power
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
        1. 7.5.1.1 I2C Address Selection
        2. 7.5.1.2 I2C General Call
        3. 7.5.1.3 I2C Speed Modes
      2. 7.5.2 Target Mode Operations
        1. 7.5.2.1 Receive Mode
        2. 7.5.2.2 Transmit Mode
      3. 7.5.3 Writing To and Reading From the Registers
      4. 7.5.4 Data Format
  10. 8 Registers
    1. 8.1 Register Map
      1. 8.1.1 Address Pointer Register (address = N/A) [reset = N/A]
      2. 8.1.2 Conversion Register (P[1:0] = 00b) [reset = 0000h]
      3. 8.1.3 Config Register (P[1:0] = 01b) [reset = 8583h]
      4. 8.1.4 Lo_thresh (P[1:0] = 10b) [reset = 8000h] and Hi_thresh (P[1:0] = 11b) [reset = 7FFFh] Registers
  11. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Basic Connections
      2. 9.1.2 Single-Ended Inputs
      3. 9.1.3 Input Protection
      4. 9.1.4 Unused Inputs and Outputs
      5. 9.1.5 Analog Input Filtering
      6. 9.1.6 Connecting Multiple Devices
      7. 9.1.7 Quick-Start Guide
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Shunt Resistor Considerations
        2. 9.2.2.2 Operational Amplifier Considerations
        3. 9.2.2.3 ADC Input Common-Mode Considerations
        4. 9.2.2.4 Resistor (R1, R2, R3, R4) Considerations
        5. 9.2.2.5 Noise and Input Impedance Considerations
        6. 9.2.2.6 First-Order RC Filter Considerations
        7. 9.2.2.7 Circuit Implementation
        8. 9.2.2.8 Results Summary
      3. 9.2.3 Application Curves
  12. 10Power Supply Recommendations
    1. 10.1 Power-Supply Sequencing
    2. 10.2 Power-Supply Decoupling
  13. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  14. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  15. 13Revision History
  16. 14Mechanical, Packaging, and Orderable Information

13 Revision History

Changes from January 1, 2018 to December 5, 2024 (from Revision D (January 2018) to Revision E (December 2024))

  • Changed all instances of legacy terminology to controller and target where I2C is mentionedGo
  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added DYN package and device family information to Features sectionGo
  • Added Device Information table, added DYN package to Package Information table and deleted last paragraph from Description sectionGo
  • Added DYN package to Pin Configuration and Functions section and changed Pin Functions tableGo
  • Added DYN package to Thermal Information tableGo
  • Changed Y-axis unit of Total Error vs Input Signal figure from μV to mV in Typical Characteristics sectionGo
  • Added additional information to last paragraph in Multiplexer sectionGo
  • Added additional information to the Voltage Reference sectionGo
  • Moved the ALERT Pin Timing Diagram from the Conversion Ready Pin section to the Digital Comparator sectionGo
  • Corrected cross reference to Timing Diagram for Reading From the ADS111x figure in Writing to and Reading From the Registers sectionGo
  • Changed bit setting notation from hexadecimal to binary where beneficial for clarity throughout Register Map sectionGo
  • Added dedicated Config Register tables for ADS1113, ADS1114, and ADS1115 and changed bit descriptions in Config Register Field Descriptions table in Config Register sectionGo
  • Changed first paragraph in Lo_threh and Hi_thresh Registers sectionGo
  • Changed Unused Inputs and Outputs sectionGo
  • Changed ADS1115 Power-Supply Decoupling figure.Go

Changes from Revision C (May 2009) to Revision D (January 2018)

  • Changed Digital input voltage max value from VDD + 0.3 V to 5.5 V in Absolute Maximum Ratings tableGo
  • Added "over temperature" to Offset drift parameter for clarityGo
  • Added Long-term Offset drift parameter in Electrical Characteristics tableGo
  • Added "over temperature" to Gain drift parameter for clarityGo
  • Added Long-term gain drift parameter in Electrical Characteristics tableGo
  • Changed VIH parameter max value from VDD to 5.5V in Electrical Characteristics tableGo
  • Added Output Data Rate and Conversion Time section for clarity.Go
  • Changed Figure 28, ALERT Pin Timing Diagram for clarityGo
  • Changed Figure 39, Typical Connections of the ADS1115, for clarityGo
  • Changed the resistor values in Figure 43, Basic Hardware Configuration, from 10Ω to 10kΩGo