SBAS608C June   2014  – December 2015 ADS7042

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Companion Products
  6. 6 Device Comparison
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Characteristics
    7. 8.7 Typical Characteristics
  9. 9 Parameter Measurement Information
    1. 9.1 Digital Voltage Levels
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 Reference
      2. 10.3.2 Analog Input
      3. 10.3.3 ADC Transfer Function
      4. 10.3.4 Serial Interface
    4. 10.4 Device Functional Modes
      1. 10.4.1 Offset Calibration
        1. 10.4.1.1 Offset Calibration on Power-Up
        2. 10.4.1.2 Offset Calibration During Normal Operation
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Single-Supply DAQ with the ADS7042
        1. 11.2.1.1 Design Requirements
        2. 11.2.1.2 Detailed Design Procedure
          1. 11.2.1.2.1 Antialiasing Filter
          2. 11.2.1.2.2 Input Amplifier Selection
          3. 11.2.1.2.3 Reference Circuit
        3. 11.2.1.3 Application Curve
      2. 11.2.2 DAQ Circuit with the ADS7042 for Maximum SINAD
        1. 11.2.2.1 Design Requirements
        2. 11.2.2.2 Detailed Design Procedure
        3. 11.2.2.3 Application Curves
      3. 11.2.3 12-Bit, 10-kSPS DAQ Circuit Optimized for DC Sensor Measurements
        1. 11.2.3.1 Design Requirements
        2. 11.2.3.2 Detailed Design Procedure
        3. 11.2.3.3 Application Curve
  12. 12Power-Supply Recommendations
    1. 12.1 AVDD and DVDD Supply Recommendations
    2. 12.2 Estimating Digital Power Consumption
    3. 12.3 Optimizing Power Consumed by the Device
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Documentation Support
      1. 14.1.1 Related Documentation
    2. 14.2 Community Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

13 Layout

13.1 Layout Guidelines

Figure 47 shows a board layout example for the ADS7042. Use a ground plane underneath the device and partition the PCB into analog and digital sections. Avoid crossing digital lines with the analog signal path and keep the analog input signals and the reference input signals away from noise sources. In Figure 47, the analog input and reference signals are routed on the top and left side of the device and the digital connections are routed on the bottom and right side of the device.

The power sources to the device must be clean and well-bypassed. Use 1-μF ceramic bypass capacitors in close proximity to the analog (AVDD) and digital (DVDD) power-supply pins. Avoid placing vias between the AVDD and DVDD pins and the bypass capacitors. Connect all ground pins to the ground plane using short, low-impedance paths. The AVDD supply voltage for the ADS7042 also functions as a reference for the device. Place the decoupling capacitor (CREF) for AVDD close to the device AVDD and GND pins and connect CREF to the device pins with thick copper tracks, as shown in Figure 47.

The fly-wheel RC filters are placed close to the device. Among ceramic surface-mount capacitors, COG (NPO) ceramic capacitors provide the best capacitance precision. The type of dielectric used in COG (NPO) ceramic capacitors provides the most stable electrical properties over voltage, frequency, and temperature changes.

13.2 Layout Example

ADS7042 apps_layout_bas608.gif Figure 47. Example Layout