SBAS856D June 2017 – May 2019 DAC8740H , DAC8741H
PRODUCTION DATA.
When interfacing the HART modem via the UART interface, the device can be thought of as a simple UART-to-HART or HART-to-UART direct feedthrough converter. The UART data is transmitted and received at 1200 baud, which is matched to the HART FSK input and output signals.
The HART communication protocol is a half-duplex protocol which means that either the modulator or demodulator is active, and never simultaneously enabled. The device arbitrates over which component of the modem is active at all times based on activity on the HART bus. Bus activity is interfaced to the host controller through the CD and RTS pins.
By default when RTS is high the demodulator is active and the modulator is inactive. When a valid carrier is detected and data is being received by the modem, the CD pin is toggled high and binary UART data is provided at the output. If a request to send is issued by toggling the RTS pin low while CD is high, the demodulator remains at priority and any data provided at the UART input is ignored. When CD is low no valid carrier is present and when RTS is brought low the modulator is activated and UART input data is latched into the modulator and placed onto the HART bus.