SBAS891B November 2017 – September 2022 ADS7142-Q1
PRODUCTION DATA
The device uses the analog supply voltage (AVDD) as a reference for the analog-to-digital conversion process. Place a 220-nF, low-ESR ceramic decoupling capacitor between the AVDD pin and the GND pin, close to the AVDD pin; see the Section 8.3 section.