SBASA70 April 2021 AMC3336
PRODUCTION DATA
The modulator generates a bitstream that is processed by a digital filter to obtain a digital word similar to a conversion result of a conventional analog-to-digital converter (ADC). A very simple filter, as calculated by Equation 2, built with minimal effort and hardware, is a sinc3-type filter:
This filter provides the best output performance at the lowest hardware size (count of digital gates) for a second-order modulator. All characterization in this document is done with a sinc3 filter with an oversampling ratio (OSR) of 256 and an output word width of 16 bits, unless specified otherwise. The measured effective number of bits (ENOB) as a function of the OSR is illustrated in Figure 8-3 or the Section 8.3 section.
An example code for implementing a sinc3 filter in an FPGA is discussed in the Combining the ADS1202 with an FPGA Digital Filter for Current Measurement in Motor Control Applications application note, available for download at www.ti.com.