SBASAA7A May 2021 – September 2021 AMC1411
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ANALOG INPUT | ||||||
VOS | Input offset voltage | TA = 25°C(1) (2) | –1.5 | ±0.1 | 1.5 | mV |
TCVOS | Input offset thermal drift(1) (2) (4) | –10 | ±3 | 10 | µV/°C | |
RIN | Input resistance | TA = 25℃ | 1 | GΩ | ||
IIB | Input bias current | IN = GND1, TA = 25℃ | –15 | 3.5 | 15 | nA |
CIN | Input capacitance | fIN = 275 kHz | 7 | pF | ||
ANALOG OUTPUT | ||||||
Nominal gain | 1 | V/V | ||||
EG | Gain error(1) | TA = 25℃ | –0.2 | ±0.05 | 0.2 | % |
TCEG | Gain error drift(1) (5) | –30 | ±5 | 30 | ppm/°C | |
Nonlineartity(1) | –0.04% | ±0.01% | 0.04% | |||
THD | Total harmonic distortion(3) | VIN = 2 VPP, VIN > 0 V, fIN = 10 kHz, BW = 10 kHz |
–87 | dB | ||
SNR | Signal-to-noise ratio | VIN = 2 VPP, fIN = 1 kHz, BW = 10 kHz | 79 | 82.6 | dB | |
VIN = 2 VPP, fIN = 10 kHz, BW = 100 kHz | 70.9 | |||||
Output noise | VIN = GND1, BW = 100 kHz | 220 | µVrms | |||
PSRR | Power-supply rejection ratio(2) | vs VDD1, at DC | –80 | dB | ||
vs VDD2, at DC | –85 | |||||
vs VDD1, 10 kHz / 100-mV ripple | –65 | |||||
vs VDD2, 10 kHz / 100-mV ripple | –70 | |||||
VCMout | Output common-mode voltage | 1.39 | 1.44 | 1.49 | V | |
VCLIPout | Clipping differential output voltage | VOUT = (VOUTP – VOUTN); VIN > VClipping |
2.49 | V | ||
VFAILSAFE | Failsafe differential output voltage | SHTDN = high, or VDD1 undervoltage, or VDD1 missing | –2.6 | –2.5 | V | |
BW | Output bandwidth | 220 | 275 | kHz | ||
ROUT | Output resistance | On OUTP or OUTN | <0.2 | Ω | ||
Output short-circuit current | On OUTP or OUTN, sourcing or sinking, IN = GND1, outputs shorted to either GND or VDD2 |
14 | mA | |||
CMTI | Common-mode transient immunity | 100 | 150 | kV/µs | ||
DIGITAL INPUT | ||||||
IIN | Input current | SHTDN pin, GND1 ≤ SHTDN ≤ VDD1 | –70 | 1 | µA | |
CIN | Input capacitance | SHTDN pin | 5 | pF | ||
VIH | High-level input voltage | 0.7 × VDD1 | V | |||
VIL | Low-level input voltage | 0.3 × VDD1 | V | |||
POWER SUPPLY | ||||||
VDD1UV | VDD1 undervoltage detection threshold | VDD1 rising | 2.5 | 2.7 | 2.9 | V |
VDD1 falling | 2.4 | 2.6 | 2.8 | |||
VDD2UV | VDD2 undervoltage detection threshold | VDD2 rising | 2.2 | 2.45 | 2.65 | V |
VDD2 falling | 1.85 | 2.0 | 2.2 | |||
IDD1 | High-side supply current | 3.0 V < VDD1 < 3.6 V | 6.0 | 8.4 | mA | |
4.5 V < VDD1 < 5.5 V, SHTDN = low | 7.1 | 9.7 | ||||
SHTDN = VDD1 | 1.3 | µA | ||||
IDD2 | Low-side supply current | 3.0 V < VDD2 < 3.6 V | 5.3 | 7.2 | mA | |
4.5 V < VDD2 < 5.5 V | 5.9 | 8.1 |