SBASAA8 December   2021 AMC1351

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagram
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Design
        2. 8.2.2.2 Differential to Single-Ended Output Conversion
      3. 8.2.3 Application Curve
    3. 8.3 What To Do and What Not To Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

6.13 Typical Characteristics

at VDD1 = 5 V, VDD2 = 3.3 V, IN = 0 V to 5 V, and fIN = 10 kHz (unless otherwise noted)

 
 
 
Figure 6-5 Output Voltage vs Input Voltage
 
Figure 6-7 Input Offset Voltage vs High-Side Supply Voltage
 
Figure 6-9 Input Offset Voltage vs Temperature
 
Figure 6-11 Gain Error vs High-Side Supply Voltage
 
Figure 6-13 Gain Error vs Temperature
 
Figure 6-15 Nonlinearity vs High-Side Supply Voltage
 
Figure 6-17 Nonlinearity vs Temperature
 
Figure 6-19 Total Harmonic Distortion vs High-Side Supply Voltage
 
Figure 6-21 Total Harmonic Distortion vs Temperature
 
Figure 6-23 Signal-to-Noise Ratio vs High-Side Supply Voltage
 
Figure 6-25 Signal-to-Noise Ratio vs Temperature
 
Figure 6-27 Common-Mode Rejection Ratio vs Supply Voltage
fIN = 10 kHz
Figure 6-29 Common-Mode Rejection Ratio vs Temperature
fRipple = 10 kHz
Figure 6-31 Power-Supply Rejection Ratio vs Temperature
 
Figure 6-33 Common-Mode Output Voltage vs Temperature
 
Figure 6-35 Output Phase vs Input Frequency
 
Figure 6-37 Bandwidth vs Temperature
 
Figure 6-39 Supply Current vs Temperature
 
Figure 6-41 Output Rise and Fall Time vs Temperature
 
Figure 6-43 Input to Output Signal Delay vs Temperature
Total uncalibrated output error is defined as:
(VOUT – VIN × G) / (VClipping × G), where G is the nominal gain of the device (0.4 V/V) and VClipping is 6.25 V
Figure 6-6 Total Uncalibrated Output Error vs Input Voltage
 
Figure 6-8 Input Offset Voltage vs Low-Side Supply Voltage
 
Figure 6-10 Input Impedance vs Temperature
 
Figure 6-12 Gain Error vs Low-Side Supply Voltage
 
Figure 6-14 Nonlinearity vs Input Voltage
 
Figure 6-16 Nonlinearity vs Low-Side Supply Voltage
 
Figure 6-18 Total Harmonic Distortion vs Input Voltage
 
Figure 6-20 Total Harmonic Distortion vs Low-Side Supply Voltage
 
Figure 6-22 Signal-to-Noise Ratio vs Input Voltage
 
Figure 6-24 Signal-to-Noise Ratio vs Low-Side Supply Voltage
 
Figure 6-26 Input-Referred Noise Density vs Frequency
 
Figure 6-28 Common-Mode Rejection Ratio vs Input Frequency
 
Figure 6-30 Power-Supply Rejection Ratio vs Ripple Frequency
 
Figure 6-32 Common-Mode Output Voltage vs Supply Voltage
 
Figure 6-34 Normalized Gain vs Input Frequency
 
Figure 6-36 Bandwidth vs Supply Voltage
 
Figure 6-38 Supply Current vs Supply Voltage
 
Figure 6-40 Output Rise and Fall Time vs Supply Voltage
 
Figure 6-42 Input to Output Signal Delay vs Supply Voltage