SBASB60 October   2024 AMC0330S-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information (D Package)
    5. 6.5  Thermal Information (DWV Package)
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications (Basic Isolation)
    8. 6.8  Insulation Specifications (Reinforced Isolation)
    9. 6.9  Safety-Related Certifications (Basic Isolation)
    10. 6.10 Safety-Related Certifications (Reinforced Isolation)
    11. 6.11 Safety Limiting Values (D Package)
    12. 6.12 Safety Limiting Values (DWV Package)
    13. 6.13 Electrical Characteristics
    14. 6.14 Switching Characteristics
    15. 6.15 Timing Diagram
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Isolation Channel Signal Transmission
      3. 7.3.3 Analog Output
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Best Design Practices
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Mechanical Data

9 Power Supply Recommendations

In a typical application, the high-side power supply (VDD1) for the AMC0x30S-Q1 is generated from the low-side supply (VDD2) by an isolated DC/DC converter. A low-cost option is based on the push-pull driver SN6501-Q1 and a transformer that supports the desired isolation voltage ratings.

The AMC0x30S-Q1 does not require any specific power-up sequencing. The high-side power supply (VDD1) is decoupled with a low-ESR, 100nF capacitor (C1) parallel to a low-ESR, 1μF capacitor (C2). The low-side power supply (VDD2) is equally decoupled with a low-ESR, 100nF capacitor (C3) parallel to a low-ESR, 1μF capacitor (C4). Place all four capacitors (C1, C2, C3, and C4) as close to the device as possible. Figure 9-1 shows a decoupling diagram for the AMC0x30S-Q1.

AMC0230S-Q1 AMC0330S-Q1 Decoupling of the AMC0x30S-Q1 Figure 9-1 Decoupling of the AMC0x30S-Q1

Capacitors provide adequate effective capacitance under the applicable DC bias conditions experienced in the application. Multilayer ceramic capacitors (MLCC) typically exhibit only a fraction of the nominal capacitance under real-world conditions. Consider this factor when selecting these capacitors. This issue is especially acute in low-profile capacitors, in which the dielectric field strength is higher than in taller components. Reputable capacitor manufacturers provide capacitance versus DC bias curves that greatly simplify component selection.