SBAU351 April   2021

 

  1.   Trademarks
  2. 1EVM Overview
    1. 1.1 ADS127L11EVM Kit
    2. 1.2 ADS127L11EVM Board
    3. 1.3 ADS127L11EVM-PDK-GUI Unsupported Features
  3. 2EVM Analog Interface
    1. 2.1 EVM Analog Input Options
    2. 2.2 ADC Connections and Decoupling
    3. 2.3 ADC Input Drive Amplifiers
    4. 2.4 VCOM Buffer
    5. 2.5 Onboard Voltage Reference
    6. 2.6 External Voltage Reference
    7. 2.7 Clock Tree
  4. 3Digital Interface
    1. 3.1 Serial Interface (SPI)
    2. 3.2 I2C Bus for Onboard EEPROM
  5. 4Power Supplies
    1. 4.1 Power Connection and Configuration
    2. 4.2 Low Dropout Regulator (LDO)
  6. 5ADS127L11EVM Software Installation
  7. 6EVM Operation
    1. 6.1 Connecting the Hardware
    2. 6.2 Optional Connections to the EVM
    3. 6.3 EVM GUI Global Settings for ADC Control
    4. 6.4 Time Domain Display
    5. 6.5 Frequency Domain Display
    6. 6.6 Histogram Display
  8. 7Bill of Materials, Schematics, and Layout
    1. 7.1 Bill of Materials
    2. 7.2 Board Layouts
    3. 7.3 Schematics
  9. 8References

Clock Tree

Figure 2-6 shows the different clock options for the ADS127L11EVM. The default position for jumper (JP7) 1-2 routes the PHI digital controller board clock to the CLK pin on the ADS127L11 (U3). If the ADS127L11EVM is used without the PHI board, then change the shunt on jumper (JP7) to position 2-3 to directly route the local clock to ADS127L11 (U3).

Jumper (JP6) selects either the local 25-MHz oscillator (Y1) on the ADS127L11EVM board, or an external clock supplied on the SMA connector (J14). The default position for jumper (JP6) 1-2 selects the local 25-MHz oscillator (Y1). The ADS127L11EVM-PDK-GUI software by default uses the 24-MHz PHI clock source, but can select the board clock source, 25-MHz (Y1) oscillator, or SMA connector (J14).

If the local 25-MHz oscillator (Y1) is used, then remove the shunt on jumper (JP3) to enable the oscillator. If an external clock source is used, use a CMOS square-wave signal with an amplitude equal to IOVDD (1.8 V with the PHI board) and a frequency within the specified range of the ADS127L11.

GUID-20210331-CA0I-RRKJ-HTX7-RPNTN9FRLJRD-low.svgFigure 2-6 Clock Tree