SBAU392A July   2022  – January 2023 AFE7950 , TRF1208

 

  1.   TRF1208-AFE7950-EVM Evaluation Module User's Guide
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 Hardware
      1. 1.1.1 Recommended Test Environment
      2. 1.1.2 Required Hardware
    2. 1.2 Required Software
      1. 1.2.1 Software Installation Sequence
      2. 1.2.2 Software Installation Checks
    3. 1.3 Signal Chain of the EVM Board
  4. 2Hardware Setup (TSW14J56 Used as an Example)
    1. 2.1 Power Supply Setup
    2. 2.2 TRF1208-AFE7950-EVM and TSW14J56 EVM Connections
    3. 2.3 RF Test Equipment Setup
  5. 3Latte Overview
    1. 3.1 Latte User Interface
    2. 3.2 Useful Latte Short-Cuts
  6. 4TRF1208-AFE7950-EVM Automatic Configuration
    1. 4.1 Steps to Start Automatic Configuration
    2. 4.2 TXDAC Evaluation
    3. 4.3 RXADC and FBADC Evaluation
  7. 5Status Check and Troubleshooting Guidelines
    1. 5.1 TRF1208-AFE7950-EVM Status Indicators
    2. 5.2 TSW14J56 EVM
  8. 6TRF1208-AFE7950-EVM Manual Configuration
    1. 6.1 TSW14J5x DAC Pattern Setup
    2. 6.2 Connect Latte to Board
    3. 6.3 Compile Libraries
    4. 6.4 Program TRF1208-AFE7950-EVM
    5. 6.5 Modify Configuration
      1. 6.5.1 Data Rate and JESD Parameters
      2. 6.5.2 Data Converter Clocks Settings
  9. 7Setup the TSW14J5x With the HSDC Pro
    1. 7.1 DAC Pattern Setup and Send
    2. 7.2 DAC Synchronization Check
    3. 7.3 ADC Data Capture
    4. 7.4 ADC Synchronization Check
  10. 8Revision History

7.4 ADC Synchronization Check

After a successful capture on the ADC side, LED D4 on the TSW14J56 board blinks to indicate a successful JESD link on the ADC side. The FFT output should also be seen. A timeout on the ADC capture indicates a unsuccessful bring-up of the AFE79xx. Try again after rerunning the AFE79xx configuration.