SBAU408 august   2023 ADS7953

 

  1.   1
  2.   ADS7953EVM-PDK Evaluation Module
  3.   Trademarks
  4. 1Overview
    1. 1.1 ADS7953EVM-PDK Features
    2. 1.2 ADS7953EVM Features
  5. 2Analog Interface
    1. 2.1 Connectors for Analog Inputs
    2. 2.2 ADC Input Signal Driver
      1. 2.2.1 Input Signal Path
  6. 3Digital Interfaces
    1. 3.1 SPI for the ADC Digital I/O
  7. 4Power Supplies
    1. 4.1 ADC Voltage Reference Configuration
  8. 5ADS7953EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface Software Installation
  9. 6ADS7953EVM-PDK Operation
    1. 6.1 EVM GUI Global Settings for ADC Control
    2. 6.2 Time Domain Display Tool
    3. 6.3 Spectral Analysis Tool
    4. 6.4 Histogram Analysis Tool
    5. 6.5 Device Configuration
    6. 6.6 Alarm Configuration
  10. 7Schematic, Bill of Materials, and Printed-Circuit Board Layout
    1. 7.1 Schematic
    2. 7.2 Bill of Materials
    3. 7.3 PCB Layout

2.2.1 Input Signal Path

Figure 2-1 shows the signal path for the analog inputs applied to the ADS7953EVM. A separate OPA192 amplifier is used in a unity-gain buffer configuration to drive the individual analog input of channel 15 (CH15). An additional OPA192 is connected from the internal multiplexer output (MXO) to the ADC input (AINP). Onboard provisioning enables both OPA192 amplifiers to be bypassed with configurable jumper options listed in Table 5-1. An RC filter with values of 33 Ω and 270 pF was selected to achieve a optimal performance at full throughput (1 MSPS) of the ADS7953.

GUID-20221007-SS0I-R5KX-L6L2-CX5NQMSGQFZX-low.svgFigure 2-1 ADS7953 Analog Input Path