SBAU413A october   2022  – may 2023

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS131B26Q1EVM-PDK Features
    2. 1.2 ADS131B26Q1EVM-PDK Quick-Start Guide
  4. 2Analog Interface
    1. 2.1 Terminal Blocks and Test Points
    2. 2.2 ADC1A and ADC1B
    3. 2.3 ADC2A and ADC2B
    4. 2.4 ADC3A and ADC3B
  5. 3Digital Interface
    1. 3.1 Connection to the PHI Controller
    2. 3.2 Digital Header
    3. 3.3 Clock Options
  6. 4Power Supplies
    1. 4.1 DC/DC Converter Circuit
    2. 4.2 ADC Power Supplies
    3. 4.3 Power Supply and Voltage Reference Decoupling
  7. 5ADS131B26Q1EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  8. 6ADS131B26Q1EVM-PDK Software Reference
    1. 6.1 Global Settings for ADC Control
    2. 6.2 Register Map Configuration
      1. 6.2.1 Register Map Basics
      2. 6.2.2 ADC1A, ADC3A and ADC1B, ADC3B Configuration
      3. 6.2.3 ADC2A and ADC2B Configuration
    3. 6.3 Analysis Tools
      1. 6.3.1 Time Domain Display
      2. 6.3.2 Spectral Analysis Tool
      3. 6.3.3 Histogram Analysis
      4. 6.3.4 Sequencer Analysis
  9. 7ADS131B26Q1EVM-PDK Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials (BOM)
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  10. 8Revision History

Histogram Analysis

The Histogram Analysis tool plots the histogram of the raw ADC conversion data for ADC1A, ADC1B, ADC3A, and ADC3B. This tool is useful for studying the statistical summary of the data set, mainly by computing the mean and standard deviation of the data from each channel. Noise degrades ADC resolution and the histogram tool can estimate an effective resolution, which is an indicator of the number of bits of ADC resolution losses resulting from noise generated by the various sources connected to the ADC when measuring a DC signal. The cumulative effect of noise coupling to the ADC output from sources such as the input drive circuits, the reference drive circuit, the ADC power supply, and the ADC is reflected in the standard deviation of the ADC output code histogram that is obtained by performing multiple conversions of a DC input applied to a given channel.

The histogram bin width is calculated using Scott's Rule by default. This method minimizes the mean-squared error in the bin approximation, assuming the data follows a Gaussian distribution. Alternatively, select Custom under the Binning Rule drop-down menu and enter the desired Codes per Bin setting in the field to the right.

Below the histogram plot is a Measurements summary table, which lists the Minimum, Maximum, Sigma, Peak-to-Peak, and Number of Bins for each channel. The histogram x-axis and the table statistics can be displayed in Codes or Voltage (V) by toggling the radio buttons under the Unit section to the right of the table.

Initiate data capture by specifying the number of samples and clicking the Capture button at the bottom of the Data Capture Configuration panel. Figure 6-7 shows an example data capture with all channels configured for an internal input short. ADC1A and ADC1B are configured for Gain = 4, and ADC3A and ADC3B are configured for Gain = 1.

GUID-20220922-SS0I-6S12-CJLH-CDSDPW34P8JW-low.svgFigure 6-7 Histogram Analysis Tool