SBAU413A october   2022  – may 2023

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS131B26Q1EVM-PDK Features
    2. 1.2 ADS131B26Q1EVM-PDK Quick-Start Guide
  4. 2Analog Interface
    1. 2.1 Terminal Blocks and Test Points
    2. 2.2 ADC1A and ADC1B
    3. 2.3 ADC2A and ADC2B
    4. 2.4 ADC3A and ADC3B
  5. 3Digital Interface
    1. 3.1 Connection to the PHI Controller
    2. 3.2 Digital Header
    3. 3.3 Clock Options
  6. 4Power Supplies
    1. 4.1 DC/DC Converter Circuit
    2. 4.2 ADC Power Supplies
    3. 4.3 Power Supply and Voltage Reference Decoupling
  7. 5ADS131B26Q1EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  8. 6ADS131B26Q1EVM-PDK Software Reference
    1. 6.1 Global Settings for ADC Control
    2. 6.2 Register Map Configuration
      1. 6.2.1 Register Map Basics
      2. 6.2.2 ADC1A, ADC3A and ADC1B, ADC3B Configuration
      3. 6.2.3 ADC2A and ADC2B Configuration
    3. 6.3 Analysis Tools
      1. 6.3.1 Time Domain Display
      2. 6.3.2 Spectral Analysis Tool
      3. 6.3.3 Histogram Analysis
      4. 6.3.4 Sequencer Analysis
  9. 7ADS131B26Q1EVM-PDK Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials (BOM)
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  10. 8Revision History

6.3.1 Time Domain Display

The Time Domain Display tool allows visualization of the ADC conversion data for ADC1A, ADC1B, ADC3A, and ADC3B. This tool is useful for both studying the circuit behavior and debugging any gross problems with the ADC or input source.

The Data Capture Configuration panel on the left side of the window allows the user to independently specify the oversampling ratio (OSR) used by ADC1A, ADC3A and ADC1B, ADC3B by configuring OSR13A and OSR13B, respectively. In addition, ADC1A or ADC1B can be selected as the driving channel source to generate the DRDYn interrupt. If the data rates differ, and the faster channel is selected as the DRDYn driving source, the GUI collects data until the faster channel reaches the specified number of samples. In this case, the slower channel ends up with fewer samples than specified. If the slower channel is selected as the DRDYn driving source, the GUI collects the specified number of samples for all channels, but some conversion data are missed from the faster channels, reducing the effective data rate.

Initiate a data capture by specifying the number of samples and clicking the Capture button at the bottom of the Data Capture Configuration panel. The raw ADC conversion data is then displayed on the graph with a statistical summary of each channel in the Measurements table below the plot. The Units radio buttons configure the plot y-axis and the summary table results as either Codes or Voltage (V). When Voltage (V) is selected, the values are input-referred based on the channel gain setting. Figure 6-5 shows an example of the Time Domain Display window and relevant controls. Switching pages to any of the other Analysis tools described in the subsequent sections exports the same data for viewing without having to recollect the data.

GUID-20220919-SS0I-BLWP-1BRQ-2KXBC99XWQKC-low.svgFigure 6-5 Time Domain Display Tool