SBAU413A october   2022  – may 2023

 

  1.   Abstract
  2.   Trademarks
  3. 1EVM Overview
    1. 1.1 ADS131B26Q1EVM-PDK Features
    2. 1.2 ADS131B26Q1EVM-PDK Quick-Start Guide
  4. 2Analog Interface
    1. 2.1 Terminal Blocks and Test Points
    2. 2.2 ADC1A and ADC1B
    3. 2.3 ADC2A and ADC2B
    4. 2.4 ADC3A and ADC3B
  5. 3Digital Interface
    1. 3.1 Connection to the PHI Controller
    2. 3.2 Digital Header
    3. 3.3 Clock Options
  6. 4Power Supplies
    1. 4.1 DC/DC Converter Circuit
    2. 4.2 ADC Power Supplies
    3. 4.3 Power Supply and Voltage Reference Decoupling
  7. 5ADS131B26Q1EVM-PDK Initial Setup
    1. 5.1 Default Jumper Settings
    2. 5.2 EVM Graphical User Interface (GUI) Software Installation
  8. 6ADS131B26Q1EVM-PDK Software Reference
    1. 6.1 Global Settings for ADC Control
    2. 6.2 Register Map Configuration
      1. 6.2.1 Register Map Basics
      2. 6.2.2 ADC1A, ADC3A and ADC1B, ADC3B Configuration
      3. 6.2.3 ADC2A and ADC2B Configuration
    3. 6.3 Analysis Tools
      1. 6.3.1 Time Domain Display
      2. 6.3.2 Spectral Analysis Tool
      3. 6.3.3 Histogram Analysis
      4. 6.3.4 Sequencer Analysis
  9. 7ADS131B26Q1EVM-PDK Bill of Materials, PCB Layout, and Schematics
    1. 7.1 Bill of Materials (BOM)
    2. 7.2 PCB Layout
    3. 7.3 Schematics
  10. 8Revision History

1.1 ADS131B26Q1EVM-PDK Features

The ADS131B26-Q1 evaluation module kit includes the following features:

  • Contains all support circuitry needed for the ADS131B26-Q1
  • USB powered: No external power supply is required
  • Analog-to-digital converter (ADC) voltage supply options:
    • DC/DC converter output provides APWR and DPWR supplies, which the ADC uses to generate AVDD and DVDD with the respective integrated low-dropout regulators (LDOs)
    • APWR and DPWR can be provided externally while still using the respective integrated LDOs when the external supply is between 4 V and 16 V
    • APWR and DPWR can be shorted to the respective LDO outputs if the external supply is between 3 V and 3.6 V
  • Clock options: Internal ADC clock, onboard 8.192-MHz crystal oscillator, or external clock with a sub-miniature version A (SMA) connector
  • Input signals provided by terminal blocks connect to various application circuits for voltage, current, and temperature measurements
  • Digital inputs and outputs are connected to a dual-row DEBUG header for connections to a logic analyzer or external controller
  • EVM GUI includes a complete register map page for ease of device configuration and a built-in analysis tool suite complete with scope, FFT, and histogram displays
  • Two 16-bit multiplexed ADC channels allow for measuring multiple single-ended and pseudo-differential inputs in a specified sequence in conjunction with the four 24-bit simultaneous-sampling ADC channels