SBAU416B November 2022 – January 2024 ADS9813
The ADS9813EVM and ADS9817EVM use single-ended sampling clock for ADC conversions. The positive sampling clock input (SMPL_CLKP) is selected using jumper J29. Install a shunt in the [2-3] position (default) to source the clock signal from the TSWDC155EVM through the FMC connector. This allows the user to select the clock frequency from the options listed in the EVM GUI.
An external clock source can also be used to control ADC conversions. Connect a low-jitter clock source to SMA connector J28 and install a shunt in the [1-2] position on J29.
The negative source of the sample clock (SMPL_CLKM) can be sourced from either the FMC connector (FMC_SMPL_CLKM) or GND through R22 or R35, respectively. By default, R35 is populated and R22 is uninstalled.