SBAU435 February   2024 ADS127L18

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1  EVM Analog Input Options
    2. 2.2  Power Requirements
    3. 2.3  ADC Connections and Decoupling
    4. 2.4  ADC Input Amplifiers
    5. 2.5  VCOM Buffer
    6. 2.6  Voltage Reference
    7. 2.7  Reference Buffer
    8. 2.8  Clock Tree
    9. 2.9  Serial Interface
    10. 2.10 EEPROM
    11. 2.11 Power Supplies
    12. 2.12 Low Dropout Regulator (LDO)
  9. 3Software
    1. 3.1 Software Description
    2. 3.2 ADS127L18 EVM Software Installation
  10. 4Implementation Results
    1. 4.1 EVM Operation
      1. 4.1.1 Evaluation Setup
      2. 4.1.2 Optional EVM Connections
      3. 4.1.3 EVM Register Settings
      4. 4.1.4 ADC Capture Settings
        1. 4.1.4.1 ADC Configuration
        2. 4.1.4.2 Clocking Configuration
        3. 4.1.4.3 SPI and Data Port Configuration
        4. 4.1.4.4 Filter Configuration
        5. 4.1.4.5 Channel Configuration
      5. 4.1.5 Time Domain Display
      6. 4.1.6 Spectral Analysis Display
      7. 4.1.7 Histogram Analysis Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Related Documentation
    1. 7.1 Supplemental Content

2.4 ADC Input Amplifiers

Figure 3-4 shows the fully differential amplifier circuit (THS4551) that drives each of the ADC input channels 0 through 7. All input channel configurations are identical but only channel 0 is shown. The input signal applied to J11 (Ch0P) and J9 (Ch0N) must be a low-distortion differential signal. The common-mode output for the amplifier is controlled by pin 7 on U10 (VOCM). The common-mode signal is set by the data converter (pin 46, VCM). The output of the amplifier connects to an RC filter that connects to the ADC input (R84, R88, C40, C38, and C41). The amplified configuration has several do-not-populate (DNP) components. These components provide flexibility, but are not required for good performance. The amplifier power supplies are connected to the AVDD and AVSS supplies that are also used for the ADC.

GUID-20240108-SS0I-RJ29-FD5P-1MHVQDMBS53K-low.svgFigure 2-4 ADC Input Amplifier