SBAU436A January   2024  – February 2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Input Options
      1. 2.1.1 Differential SMA Inputs
      2. 2.1.2 Single-Ended SMA Inputs
      3. 2.1.3 Differential Input Pins
    2. 2.2 Power Supplies
    3. 2.3 ADC Connections and Decoupling
    4. 2.4 ADC Input Amplifiers
    5. 2.5 VCOM Buffer
    6. 2.6 Voltage Reference
    7. 2.7 Clock Tree
    8. 2.8 Digital Interfaces
  9. 3Software
    1. 3.1 ADS1278EVM Software Installation
  10. 4Implementation Results
    1. 4.1 Hardware Connections
    2. 4.2 Optional EVM Configuration
    3. 4.3 GUI Settings for ADC Control
    4. 4.4 Time Domain Display
    5. 4.5 Frequency Domain Display
    6. 4.6 Histogram Display
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References
  14. 8Revision History

2.4 ADC Input Amplifiers

Figure 3-5 shows the fully differential amplifier (THS4551) circuit used to drive the ADC. The input applied to AINP and AINN must be a low-distortion differential signal. Pin 7 on U13 (VOCM) controls the common-mode output for the amplifier, and is set by the ADS1278 VCOM output (pin 55). The feedback network includes a low pass filter (R74, R78, R94, R91, C36, and C52). The amplifier output connects to an RC filter that connects to the ADC input (R37, R43, C30, C26, and C32). The amplified configuration has several do-not-populate (DNP) components that provide flexibility, but are not required for good performance. The amplifier power supplies are connected by default to the AVDD and GND supplies that are also used for the ADC.

GUID-20231113-SS0I-2Q4L-KKJC-PDQL68LTJVMV-low.svgFigure 2-5 Input Drive Amplifier Circuit