SBAU439 January   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Analog Interface
      1. 2.1.1 ADC Channel Inputs
        1. 2.1.1.1 High-bandwidth, Fully-Differential Circuit: THS4551
        2. 2.1.1.2 Precision, High-CMRR Circuit: PGA855
      2. 2.1.2 Voltage Reference
    2. 2.2 Power Supplies
      1. 2.2.1 USB Power and When to Power the Board Externally
    3. 2.3 Digital Interface and Clock Inputs
      1. 2.3.1 Digital Interface Connections
      2. 2.3.2 Clock Select
    4. 2.4 ADS9227EVM Quick Start Guide
  9. 3Software
    1. 3.1 ADS9227EVM Software Reference
      1. 3.1.1 ADS9227EVM-GUI Software Installation
      2. 3.1.2 USB Driver Installation
      3. 3.1.3 Using the CONFIG Tab
      4. 3.1.4 Using the Capture Tab
      5. 3.1.5 Using the INL/DNL Tool
      6. 3.1.6 Using the Histogram Tab
  10. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials (BOM)
  11. 5Additional Information
    1.     Trademarks
  12. 6Related Documentation

Precision, High-CMRR Circuit: PGA855

Figure 3-3 shows the schematic for the PGA855 input circuit connected to ADC B. The PGA855 is a high-bandwidth programmable gain instrumentation amplifier with fully differential outputs. This circuit is designed for input signal frequencies up to approximately 300kHz. The gain of the PGA855 is set by the combination of three binary gain pins, which are configured using the corresponding jumpers on the EVM (see Table 3-1).

The PGA855 uses separate supply voltages for the input stage and the output stage. The input stage supply rails (VS+ and VS-) can range up to ±18 V and must be provided externally. Connect the VS+ and VS- supply voltages and a ground wire from an external power source to the J3 terminal block on the EVM. The output stage supply rails (LVDD and LVSS) are shared with the ADS9227 analog supplies (AVDD_5V and GND). This is done intentionally to limit the output swing of the PGA855 and to protect the ADS9227 inputs from overdrive.

Table 2-1 PGA855 Gain Settings
A2 (JP8) A1 (JP9) A0 (JP10) Gain (V/V)

0

0

0

0.125

0

0

1

0.25

0

1

0

0.5

0

1

1

1

1

0

0

2

1

0

1

4

1

1

0

8

1

1

1

16

GUID-20240112-SS0I-2NPH-PBQM-C2RKX9KP7JLD-low.svg Figure 2-3 PGA855, High-CMRR Circuit for ADC B