SBAU441 March   2024

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Board Overview
    2. 2.2 Required Equipment
    3. 2.3 Hardware Setup
  9. 3Software
    1. 3.1 Required Software
    2. 3.2 Software Setup
  10. 4Implementation Results
    1. 4.1 Evaluation Setup
    2. 4.2 Data Capture
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7References

Features

  • Noise spectral density: -159 dBFS/Hz
  • Thermal noise: 75 dBFS
  • Full power input bandwidth (-3dB): 1.5GHz
  • Power consumption: 300 mW/channel (500 MSPS)
  • Digital down-converters, up to two per channel, complex and real decimation up to /16384
  • 48-bit NCO phase coherent frequency hopping
  • DDR/Serial LVDS interface: 16-bit or 32-bit output mode