SBAU448 September   2024 ADS8681W

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Performance Development Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Analog Interface
      1. 2.1.1 ADC Analog Input Signal Path
      2. 2.1.2 Onboard ADC Reference
    2. 2.2 Power Supplies
  9. 3Software
    1. 3.1 Digital Interfaces
      1. 3.1.1 multiSPITM SPI for ADC Digital IO
    2. 3.2 ADS8681WEVM-PDK Initial Setup
      1. 3.2.1 Default Jumper and Switch Settings
      2. 3.2.2 EVM Graphical User Interface (GUI) Software Installation
  10. 4Implementation Results
    1. 4.1 ADS8681WEVM-PDK Operation
      1. 4.1.1 EVM GUI Global Settings for ADC control
      2. 4.1.2 Register Map Configuration Tool
      3. 4.1.3 Time Domain Display Tool
      4. 4.1.4 Histogram Tool
      5. 4.1.5 Spectral Analysis Tool
      6. 4.1.6 Linearity Analysis Tool
  11. 5Hardware Design Files
    1. 5.1 ADS8681WEVM-PDK Schematic
    2. 5.2 PCB Layout
    3. 5.3 Bill of Materials
  12. 6Additional Information
    1. 6.1 Trademarks
  13. 7Related Documentation

3.1.1 multiSPITM SPI for ADC Digital IO

The ADS8681WEVM-PDK supports all the interface modes as detailed in the SBASAY5ADS868x 16-Bit, High-Speed, Single-Supply, SAR ADC DAQ System With Programmable, Bipolar Input Ranges data sheet. In addition to the standard SPI modes (with single-, dual-, and quad-SDO lanes) the multiSPI™ modes support single- and dual-data output rates and the four possible clock source settings as well. The PHI is capable of operating at a 1.8V logic level and is directly connected to the digital I/O lines of the ADC.

The ADS8681WEVM offers 49.9Ω resistors between the SPI signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges can cause overshoot; these 49.9Ω resistors slow down the signal edges to minimize signal overshoot.