Design Goals

Design Description

This circuit consists of an op amp configured as a transimpedance amplifier for amplifying the light-dependent current of a photodiode.

Design Notes

1. A bias voltage (V_ref) prevents the output from saturating at the negative power supply rail when the input current is 0A.
2. Use a JFET or CMOS input op amp with low bias current to reduce DC errors.
3. Set output range based on linear output swing (see A_ol specification).

Design Steps

1. Select the gain resistor.
   ${\mathrm{R}}_1=\frac{{\mathrm{V}}_{\mathrm{oMax}}-{\mathrm{V}}_{\mathrm{oMin}}}{{\mathrm{I}}_{\mathrm{iMax}}}=\frac{4.9\mathrm{V}-0.1\mathrm{V}}{2.4\mathrm{\mu A}}=2\mathrm{M\Omega }$
2. Select the feedback capacitor to meet the circuit bandwidth.
   ${\mathrm{C}}_1\le \frac{1}{2\times \mathrm{\pi }\times {\mathrm{R}}_1\times {\mathrm{f}}_{\mathrm{p}}}$
   ${\mathrm{C}}_1\le \frac{1}{2\times \mathrm{\pi }\times 2\mathrm{M\Omega }\times 20\mathrm{kHz}}\le 3.97\mathrm{pF}\approx 3.3\mathrm{pF}\text{ (Standard Value)}$
3. Calculate the necessary op amp gain bandwidth (GBW) for the circuit to be stable.
   $\mathrm{GBW}>\frac{{\mathrm{C}}_{\mathrm{i}}+{\mathrm{C}}_1}{2\times \mathrm{\pi }\times {\mathrm{R}}_1\times {{\mathrm{C}}_1}^2}>\frac{13\mathrm{pF}+3.3\mathrm{pF}}{2\times \mathrm{\pi }\times 2\mathrm{M\Omega }\times {(3.3\mathrm{pF})}^2}>119\mathrm{kHz}$
   $\begin{array}{l}\text{where }{\mathrm{C}}_{\mathrm{i}}={\mathrm{C}}_{\mathrm{j}}+{\mathrm{C}}_{\mathrm{d}}+{\mathrm{C}}_{\mathrm{cm}}=11\mathrm{pF}+2\mathrm{pF}+1\mathrm{pF}=13\mathrm{pF}\text{ given }\end{array}$
   • C_j: Junction capacitance of photodiode
   • C_d: Differential input capacitance of the amplifier
   • C_cm: Common-mode input capacitance of the inverting input
4. Calculate the bias network for a 0.1V bias voltage.
   ${\mathrm{R}}_2=\frac{{\mathrm{V}}_{\mathrm{cc}}-{\mathrm{V}}_{\mathrm{ref}}}{{\mathrm{V}}_{\mathrm{ref}}}\times {\mathrm{R}}_3$
   ${\mathrm{R}}_2=\frac{5\mathrm{V}-0.1\mathrm{V}}{0.1\mathrm{V}}\times {\mathrm{R}}_3$
   ${\mathrm{R}}_2=49\times {\mathrm{R}}_3$
   $$\begin{gathered} \text{Closest 1\% resistor values that yield this relationship are} \\ {\mathrm{R}}_2=13.7\mathrm{k\Omega }\text{ and }\mathrm{}\mathrm{}{\mathrm{R}}_3=280\mathrm{\Omega } \end{gathered}$$
5. Select C₂ to be 1µF to filter the V_ref voltage. The resulting cutoff frequency is:

Design Simulations

DC Simulation Results

AC Simulation Results

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See the circuit SPICE simulation file:

• For TINA-TI: SBOMCH8
• For PSpice for TI: SBOMCH0

See TIPD176.

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