Design Goals

Design Description

This circuit utilizes two comparators in parallel to determine if a signal is between two reference voltages. If the signal is within the window, the output is high. If the signal level is outside of the window, the output is low. For this design, the reference voltages are generated from a single supply with voltage dividers.

Design Notes

1. The input should not exceed the common mode limitations of the comparators.
2. If higher pullup voltages are used, R_p should be sized accordingly to prevent large current draw. The TLV1701 supports pullup voltages up to 36 V.
3. Comparator must be open-drain or open-collector to allow for the ORed output.

Design Steps

1. Define the upper (V_H) and lower (V_L) window voltages.
   ${\mathrm{V}}_{\mathrm{H}}={\mathrm{V}}_{\mathrm{cc}}\times \frac{{\mathrm{R}}_1+{\mathrm{R}}_2}{{\mathrm{R}}_1+{\mathrm{R}}_2+{\mathrm{R}}_3}=3.33\mathrm{V}$
   ${\mathrm{V}}_{\mathrm{L}}={\mathrm{V}}_{\mathrm{cc}}\times \frac{{\mathrm{R}}_1}{{\mathrm{R}}_1+{\mathrm{R}}_2+{\mathrm{R}}_3}=1.66\mathrm{V}$
   $\frac{{\mathrm{V}}_{\mathrm{H}}}{{\mathrm{V}}_{\mathrm{L}}}=1+\frac{{\mathrm{R}}_2}{{\mathrm{R}}_1}=\frac{3.33\mathrm{V}}{1.66\mathrm{V}}=2$
2. Choose resistor values to achieve the desired window voltages.
   $\frac{{\mathrm{V}}_{\mathrm{H}}}{{\mathrm{V}}_{\mathrm{L}}}=1+\frac{{\mathrm{R}}_2}{{\mathrm{R}}_1}=2\text{, so }{\mathrm{R}}_2={\mathrm{R}}_1$
   ${\mathrm{R}}_1={\mathrm{R}}_2=10\mathrm{k\Omega }\text{ (Selected standard values)}$

Design Simulations

Transient Simulation Results

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See the circuit SPICE simulation file SBOC516.

See TIPD178.

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