Design Goals

Design Description

This design is used to buffer signals by presenting a high input impedance and a low output impedance. This circuit is commonly used to drive low-impedance loads, analog-to-digital converters (ADC) and buffer reference voltages. The output voltage of this circuit is equal to the input voltage.

Design Notes

1. Use the op-amp linear output operating range, which is usually specified under the A_OL test conditions.
2. The small-signal bandwidth is determined by the unity-gain bandwidth of the amplifier.
3. Check the maximum output voltage swing versus frequency graph in the data sheet to minimize slew-induced distortion.
4. The common mode voltage is equal to the input signal.
5. Do not place capacitive loads directly on the output that are greater than the values recommended in the data sheet.
6. High output current amplifiers may be required if driving low impedance loads.
7. For more information on op-amp linear operating region, stability, slew-induced distortion, capacitive load drive, driving ADCs, and bandwidth, see the Design References section.

Design Steps

The transfer function for this circuit follows:

1. Verify that the amplifier can achieve the desired output swing using the supply voltages provided. Use the output swing stated in the A_OL test conditions. The output swing range of the amplifier must be greater than the output swing required for the design.
   $-14\mathrm{V}\le {\mathrm{V}}_{\mathrm{o}}\le 14\mathrm{V}$
   • The output swing of the LM7332 using ±15V supplies is greater than the required output swing of the design. Therefore, this requirement is met.
   • Review the Output Voltage versus Output Current curves in the product data sheet to verify the desired output voltage can be achieved for the desired output current.
2. Verify the input common mode voltage of the amplifier is not violated using the supply voltage provided. The input common mode voltage range of the amplifier must be greater than the input signal voltage range.
   $-15.1 \mathrm{V}\le {\mathrm{V}}_{\mathrm{icm}}\le 15.1 \mathrm{V}$
   • The input common-mode range of the LM7332 using ±15V supplies is greater than the required input common-mode range of the design. Therefore, this requirement is met.
3. Calculate the minimum slew rate required to minimize slew-induced distortion.
   $\mathrm{SR}>2\times \mathrm{\pi }\times \mathrm{Vp}\times \mathrm{f}=2\times \mathrm{\pi }\times 10\mathrm{V}\times 100\mathrm{kHz}=6.28\mathrm{V}/\mathrm{\mu s}$
   • The slew rate of the LM7332 is 15.2 V/µs. Therefore, this requirement is met.
4. Verify the device has sufficient bandwidth for the desired output signal frequency.
   ${\mathrm{f}}_{\mathrm{signal}}<{\mathrm{f}}_{\mathrm{unity}}$
   $100kHz <\hspace{0.17em}7.5MHz$
   • The desired output signal frequency is less than the unity-gain bandwidth of the LM7332. Therefore, this requirement is met.

Design Simulations

DC Simulation Results

AC Simulation Results

Design References

Texas Instruments, Capacitive Load Drive Verified Reference Design Using an Isolation Resistor, TIPD128 verified design

Texas Instruments, Simulation for Buffer (Follower) Circuit, SBOC491 software tool

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