Load Current (IL) | System Supply | Comparator Output Status | Radiation | |||
---|---|---|---|---|---|---|
Over Current (IOC) | Recovery Current (IRC) | Typical | Over Current | Normal Operation | Total Ionizing Dose (TID) | SEL Immunity to LET |
1 A | 0.5 A | 10 V | VOL < 0.4 V | VOH = VPU = 3.3 V | 30 krad(Si) | 43 MeV·cm2/mg |
This application brief shows how to implement a simple rad-tolerant circuit that detects an over-current event caused by a single-event latch-up (SEL), in systems where not all other components SEL immune up to the target LET. This solution uses one comparator with a rail-to-rail input common mode range to create an over-current alert (OC-Alert) signal at the comparator output (COMP OUT) if the load current rises above 1A. The OC-Alert signal in this implementation is active low. So when the 1A threshold is exceeded, the comparator output goes low. Hysteresis is implemented such that OC-Alert will return to a logic high state when the load current reduces to 0.5A (a 50% reduction). This circuit uses an open-collector output comparator in order to level shift the output high logic level for controlling a digital logic input pin. For applications needing to drive the gate of a MOSFET switch, a comparator with a push-pull output is preferred.
See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.
See Circuit SPICE Simulation File SBOMBL5, http://www.ti.com/lit/zip/sbombl5.
TLV1704-SEP | |
---|---|
VS | 2.2 V to 36 V |
VinCM | Rail-to-rail |
VOUT | Open-Collector, Rail-to-rail |
VOS | 500 µV |
IQ | 55 µA/channel |
tPD(HL) | 460 ns |
#Channels | 4 |
TID Characterization (ELDRS-Free) | 30 krad(Si) |
TID Radiation Lot Acceptance Test (RLAT) / RHA | 20 krad(Si) |
SEL Immune to LET | 43 MeV·cm2/mg |
https://www.ti.com/product/TLV1704-SEP |
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