5 Depth, Range, and LET_EFF Calculation

The TRF0206-SP is fabricated in the TI SiGe-BiCMOS process and the die is packaged as a flip chip. The decapped unit exposes the silicon substrate directly when packaged in the flip-chip configuration. The units used were backgrinded to 50 microns, for proper ion penetration. The effective LET (LET_EFF), depth and range was determined with the custom RADsim-IONS application (developed at Texas Instruments and based on the latest SRIM2013 [4] models). The applications accounts for energy loss through the 1-mil thick Aramica (DuPont®Kevlar®) beam port window and the air gap between the DUT and the heavy-ion exit port (40 mm). An image of the RADsim – IONS is shown in Figure 5-1 and the ions details are provided in Table 5-1.

Figure 5-1 GUI of RADsim Application Used to Determine Key Ion Parameters