SBOA583 December 2023 OPA205 , OPA206 , OPA210 , OPA2206 , OPA2210 , OPA2392 , OPA2828 , OPA320 , OPA328 , OPA365 , OPA392 , OPA397 , OPA828
Exceeding the output swing range for an amplifier causes transistors in the output stage to saturate for bipolar and triode for CMOS. Once the input condition causing the output swing violation is removed, it takes some time for the output to leave this non-linear condition. This time period is called the overload recovery time. Transitioning a bipolar transistor from a saturated state to a linear operating state introduces a delay because, when in saturation, the transistors gain is abnormally low, and the collector-to-base junction is forward biased. Some time is required for this abnormal condition to reverse itself.
Many amplifier data sheets provide a specification or graph showing output overload recovery time. This specification relates to driving the output outside the valid output voltage swing limit. A similar phenomenon can occur when input common-mode limits are exceeded, but this effect is generally not specified. For a particular device, the overload recovery time can differ depending on if the output is saturated to the positive or negative power supply rail. This difference is because the type of output transistor saturated is different in the two cases, and the two different transistor types have different specifications. It is also worth noting that zero-drift amplifier types can have significantly longer overload recover times as compared to traditional amplifiers. This is because a saturated amplifier has a very large differential input voltage and the zero-drift calibration mechanism attempts to correct for that error. Once the input is transitioned to a valid range, the zero-drift calibration takes several clock cycles to recover from the overload condition, so a recovery time of 10 μs to 50 μs is not unusual.
Figure 14-1 shows a typical graph illustrating the overload recovery for OPA828. In this example, the amplifier is configured in a gain of –10 V/V with a –2-V input applied to saturate the output to +18 V. The input signal is stepped from –2 V to 0 V to bring the output out of saturation. The delay from the start of the step to where the output leaves the saturated state indicates the positive overload recovery time. The negative overload recovery time uses the same method but the input step transitions from +2 V to 0 V. Notice that the positive and negative recovery time is different for the two cases (40 ns and 50 ns, respectively).