SBOA586 February   2024 OPA182 , OPA186 , OPA187 , OPA188 , OPA189 , OPA333 , OPA387 , OPA388

 

  1.   1
  2.   Abstract
  3. Benefit of Zero-Drift Amplifiers
  4. Internal Operation of Choppers
  5. Chopping Input Current Transients
  6. Bias Current Translation Into Offset
  7. Chopping Current Transient Impact on Offset Voltage
  8. Input Bias Current versus Bias Transients
  9. Amplifier Intrinsic Noise
  10. Chopper Transient Noise
  11. Procedure for Selecting a Zero-Drift Amplifier
  12. 10Summary
  13. 11References

Bias Current Translation Into Offset

The remainder of this document focuses on the translation of bias current and bias current transients into offset voltage in chopper amplifiers. This section reviews the general theory on how bias currents translate into offset voltages. This theory applies to both chopper and traditional amplifiers, and is pertinent background information for the discussions in the following sections.

Figure 4-1 shows the op amp model for bias current. Using the principle of superposition, you can determine the offset shift for each of the bias current sources separately, then combine the result. In superposition, only one source is considered at a time and the unused current sources are replaced with opens while the unused voltage sources are replaced with shorts. Figure 4-2 shows the superposition diagram for calculation of the output offset due to IBN. Considering the amplifier to be ideal, there is a virtual short between the inverting and non-inverting input terminals. Since the non-inverting input is grounded, the inverting input is virtually grounded and the voltage across Rg is 0V. Thus, there is no current through Rg so all the bias current flows through Rf. The output offset is –IBNRf (see Equation 1). This offset can be referred to the input by dividing by the op amp closed loop gain. Simplifying this equation yields Equation 2. Thus, the offset referred to the input from IBN is the bias current multiplied by the parallel combination of Rf and Rg.

Equation 1. V I B N _ R T O = - I B N R f
Equation 2. V I B N = - I B N R f / ( R f R g + 1 )   =   - I B N R f R g   R g + R f   = - I B N ( R f   | |   R g )  
GUID-20231214-SS0I-L4VV-LB5F-SF9PW1FS9FMQ-low.svg Figure 4-1 Op Amp Model for Bias Current
GUID-20231214-SS0I-LWRK-0GBN-L3J76DFK6BDP-low.svg Figure 4-2 Offset due to IBN for Superposition Calculation

Figure 4-3 shows the superposition diagram for calculation of the output offset due to IBP. In this case the offset calculation is simply the bias current multiplied by the source impedance, VIBP = IBRS. Note that when the bias current from both the inverting and non-inverting input flow in the same direction, the polarity of the offset generated by inverting and non-inverting inputs oppose each other. In cases where IBN = IBP and both currents flow in the same direction, the feedback network impedance and source impedance can be balanced to cancel the bias current effects, Rs = (Rf || Rg). However, in general CMOS bias currents and chopper transients are not equal, so balancing the impedances may not improve the bias current related offset voltage error much and can actually make the error worse. Section 6 covers this topic in more detail.

GUID-20231214-SS0I-3XZC-ZNKW-31CQ1MGF5M7T-low.svg Figure 4-3 Offset due to IBP for Superposition Calculation