SBOA597 November   2024 OPA928

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Architecture of Small Current Measurement
    1. 2.1 Coulombmeter
    2. 2.2 Using the Coulombmeter to Determine IB
    3. 2.3 Leakage of Integration Capacitor
  6. 3Benchmarking
    1. 3.1 Point to Point Wiring
    2. 3.2 Shielding
    3. 3.3 PCB Cleaning
    4. 3.4 Temperature Stability
  7. 4Calibration Using a Coulombmeter for Application Circuits
    1. 4.1 Calibration of Common Application Circuits
    2. 4.2 Calibration of Inverting Input
    3. 4.3 Calibration of Non-Inverting Input
    4. 4.4 Determine Resistance of the Capacitor Using Zero-Cross Method
    5. 4.5 Dielectric Absorption and Relaxation
    6. 4.6 Calibration at 85°C
    7. 4.7 Calibration at 25C
  8. 5Summary
  9. 6References

4.4 Determine Resistance of the Capacitor Using Zero-Cross Method

As mentioned previously, an integration capacitor can have leakage current flowing through the parasitic resistance between the plates. Since this path is resistive, the leakage current is proportional to the voltage delta between the terminals. The schematic shows a model of capacitor leakage. Vcal bias determines the direction of the leakage current because the input terminal is always zero volts; technically, little away from zero volts due to the input offset voltage of the op amp. There are four types of combinations depending on the sign of IB and the sign of Vcal.

Capacitor Leakage Model for Positive IB Figure 4-8 Capacitor Leakage Model for Positive IB

For positive IB, if the junction voltage, Vcal, is negative (lower than the input terminal bias), the high-impedance node reduces charge faster than the original IB due to the leakage across the capacitor. Also, if the junction voltage, Vcal, is positive, the leakage cancels out IB. Therefore, measured dV/dt can be smaller as Vcal is increased.

Capacitor Leakage Changes Vcal Over Time (Positive IB) Figure 4-9 Capacitor Leakage Changes Vcal Over Time (Positive IB)
Capacitor Leakage Model for Negative IB Figure 4-10 Capacitor Leakage Model for Negative IB

The opposite is true for negative IB. If the junction voltage, Vcal, is positive (higher than the input terminal bias), the high-impedance node accumulates charge faster than the actual IB due to the leakage across the capacitor. also, when the junction voltage, Vcal, is negative, the leakage cancels out IB. Therefore, measured dV/dt can be smaller as Vcal is lower.

Capacitor Leakage Changes Vcal Over Time (Negative IB) Figure 4-11 Capacitor Leakage Changes Vcal Over Time (Negative IB)

We can estimate the error of measured IB compared to the actual IB by using the resistivity of the integration capacitor as 250PΩ determined in Section 2.

If a measured slope of voltage across the 100pF capacitor is 1uV/sec, Vcal is 1V, IB is calculated as

1 x 10-6 x 100 x 10-12 = 100aA (without calibration)

1 x 10-6 x 100 x 10-12 + 1 / 250 x 10-15 = 104aA (with calibration)

Focusing on the point that minimizes the leak across the capacitor can give us a method to determine IB more accurately. As the integrator accumulates charges, the voltage across the integration capacitor crosses zero volts. We can take a derivative at this point and obtain the least leakage condition to determine IB. For positive IB, Vcal needs to start from negative. For negative IB, Vcal needs to start from positive so that we can see the capacitor voltage crosses zero volts.

Suppose if the resistance follows the Ohm’s row, leakage of the capacitor is proportional to Vcal.

Drawing below models zero-cross method for positive IB, two parameters are used – leakage and IB over Vcal.

Model of the Zero-Cross Method for Positive IB Figure 4-12 Model of the Zero-Cross Method for Positive IB

Drawing below models zero-cross method for or negative IB, two parameters are used – leakage and IB over Vcal.

Model of the Zero-Cross Method for Negative IB Figure 4-13 Model of the Zero-Cross Method for Negative IB

For example, Vcal is measured over time, as shown in the graph below. The voltage across the capacitor starts from -400mV. As the integration goes by, the voltage crosses zero. The derivative of the curve when Vcal crosses zero volts gives 312aA. The dV/dt x C, when the voltage crosses zero, is the lowest leakage current achievable. Please note that Vcal is the voltage across the integration capacitor. Measuring IB in the condition is considered as the lowest leakage on the integration capacitor, Zero-cross method.

Zero-Cross Method Provides the Least Leakage Condition to Read IB Figure 4-14 Zero-Cross Method Provides the Least Leakage Condition to Read IB