SBOK052 May   2024 OPA4H014-SEP

 

  1.   1
  2.   OPA4H014-SEP Single-Event Latch-Up (SEL) Radiation Report
  3.   Trademarks
  4. 1Overview
  5. 2SEE Mechanisms
  6. 3Irradiation Facilities and Telemetry
  7. 4Test Device and Test Board Information
    1. 4.1 Qualification Devices and Test Board
    2. 4.2 Characterization Devices and Test Boards
  8. 5Results
    1. 5.1 SEL Qualification Results
    2. 5.2 SET Characterization Results: TAMU K500 Cyclotron
    3. 5.3 SEE Characterization Results: MSU FRIB Linac
    4. 5.4 Analysis
    5. 5.5 Weibull Fit
  9. 6Summary
  10.   A TAMU Results Appendix
  11.   B MSU Results Appendix
  12.   C Confidence Interval Calculations
  13.   D References

2 SEE Mechanisms

The primary single-event effect (SEE) of interest in the OPA4H014-SEP is single-event latch-up (SEL). From a risk and potential impact point-of-view, the occurrence of an SEL is possibly the most destructive SEE event and the biggest concern for space applications. A BICMOS process node was used for the OPA4H014-SEP, though the device itself is primarily bipolar. CMOS circuitry introduces a potential for SEL susceptibility. SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts). The parasitic bipolar structure initiated by a single-event creates a high-conductance path (inducing a steady-state current that is typically orders of magnitude higher than the normal operating current) between power and ground that persists (is latched) until the power is removed or until the device is destroyed by the high-current state.

The OPA4H014-SEP is specified as SEL-free to a surface LETEFF of 43MeV-cm2/ mg, at a fluence of 107 ions / cm2 and a chip temperature of 125°C. The process modifications applied for SEL-mitigation were proven sufficient as the OPA4H014-SEP was shown in characterization to exhibit no SEL with heavy ions up to a surface LETEFF of 50MeV-cm2/ mg, at a fluence of 107 ions / cm2 and a chip temperature of 125°C.