SBOS473L March 2009 – July 2024 TMP112 , TMP112D
PRODUCTION DATA
Figure 7-8 shows the internal register structure of the TMP112 family. The 8-bit Pointer Register of the device is used to address a given data register. The Pointer Register uses the two LSBs (see Table 7-13) to identify which of the data registers must respond to a read or write command. The power-up reset value of P1/P0 is '00'. By default, the TMP112 family reads the temperature on power-up.
Table 7-6 lists the pointer address of the registers available in the TMP112 family. Table 7-7 lists the bits of the Pointer Register byte. During a write command, bytes P2 through P7 must always be 0.
P1 | P0 | REGISTER |
---|---|---|
0 | 0 | Temperature Register (Read Only) |
0 | 1 | Configuration Register (Read/Write) |
1 | 0 | TLOW Register (Read/Write) |
1 | 1 | THIGH Register (Read/Write) |
P7 | P6 | P5 | P4 | P3 | P2 | P1 | P0 |
---|---|---|---|---|---|---|---|
0 | 0 | 0 | 0 | 0 | 0 | Register Bits |