SBOS516H September   2010  – June 2024 OPA171 , OPA2171 , OPA4171

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information: OPA171
    5. 5.5 Thermal Information: OPA2171
    6. 5.6 Thermal Information: OPA4171
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics: Table of Graphs
    9. 5.9 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Characteristics
      2. 6.3.2 Common-Mode Voltage Range
      3. 6.3.3 Phase-Reversal Protection
      4. 6.3.4 Capacitive Load and Stability
    4. 6.4 Device Functional Modes
      1. 6.4.1 Common-Mode Voltage Range
  8. Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Electrical Overstress
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Capacitive Load and Stability
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Support Resources
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Typical Characteristics: Table of Graphs

Table 5-1 Characteristic Performance Measurements
DESCRIPTIONFIGURE
Offset Voltage Production DistributionFigure 5-1
Offset Voltage Drift DistributionFigure 5-2
Offset Voltage vs TemperatureFigure 5-3
Offset Voltage vs Common-Mode VoltageFigure 5-4
Offset Voltage vs Common-Mode Voltage (Upper Stage)Figure 5-5
Offset Voltage vs Power SupplyFigure 5-6
IB and IOS vs Common-Mode VoltageFigure 5-7
Input Bias Current vs TemperatureFigure 5-8
Output Voltage Swing vs Output Current (Maximum Supply)Figure 5-9
CMRR and PSRR vs Frequency (Referred-to Input)Figure 5-10
CMRR vs TemperatureFigure 5-11
PSRR vs TemperatureFigure 5-12
0.1-Hz to 10-Hz NoiseFigure 5-13
Input Voltage Noise Spectral Density vs FrequencyFigure 5-14
THD+N Ratio vs FrequencyFigure 5-15
THD+N vs Output AmplitudeFigure 5-16
Quiescent Current vs TemperatureFigure 5-17
Quiescent Current vs Supply VoltageFigure 5-18
Open-Loop Gain and Phase vs FrequencyFigure 5-19
Closed-Loop Gain vs FrequencyFigure 5-20
Open-Loop Gain vs TemperatureFigure 5-21
Open-Loop Output Impedance vs FrequencyFigure 5-22
Small-Signal Overshoot vs Capacitive Load (100-mV Output Step)Figure 5-23, Figure 5-24
No Phase ReversalFigure 5-25
Positive Overload RecoveryFigure 5-26
Negative Overload RecoveryFigure 5-27
Small-Signal Step Response (100 mV)Figure 5-28, Figure 5-29
Large-Signal Step ResponseFigure 5-30, Figure 5-31
Large-Signal Settling Time (10-V Positive Step)Figure 5-32
Large-Signal Settling Time (10-V Negative Step)Figure 5-33
Short-Circuit Current vs TemperatureFigure 5-34
Maximum Output Voltage vs FrequencyFigure 5-35
Channel Separation vs FrequencyFigure 5-36