SBOS721B October 2014 – October 2024 TMP75B-Q1
PRODUCTION DATA
The first byte transmitted by the controller is the target address, with the R/W bit low. The TMP75B-Q1 then acknowledges reception of a valid address. The next byte transmitted by the controller is the pointer register. The TMP75B-Q1 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the register addressed by the pointer register. The TMP75B-Q1 acknowledges reception of each data byte. The controller can terminate data transfer by generating a start or stop condition.