SBOS758F April   2016  – June 2024 THS6212

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics VS = 12 V
    6. 5.6 Electrical Characteristics VS = 28 V
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics: VS = 12 V
    9. 5.9 Typical Characteristics: VS = 28 V
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Voltage and Current Drive
      2. 6.3.2 Driving Capacitive Loads
      3. 6.3.3 Distortion Performance
      4. 6.3.4 Differential Noise Performance
      5. 6.3.5 DC Accuracy and Offset Control
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Wideband Current-Feedback Operation
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
      2. 7.2.2 Dual-Supply Downstream Driver
        1. 7.2.2.1 Design Requirements
        2. 7.2.2.2 Detailed Design Procedure
          1. 7.2.2.2.1 Line Driver Headroom Requirements
          2. 7.2.2.2.2 Computing Total Driver Power for Line-Driving Applications
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.3.4 Differential Noise Performance

The THS6212 is designed to be used as a differential driver in high-performance applications. Therefore, analyzing the noise in such a configuration is important. Figure 6-3 shows the op amp noise model for the differential configuration.

THS6212 Differential Op Amp Noise Analysis Model Figure 6-3 Differential Op Amp Noise Analysis Model

As a reminder, the differential gain is expressed in Equation 1:

Equation 1. THS6212

The output noise can be expressed as shown in Equation 2:

Equation 2. THS6212

Dividing this expression by the differential noise gain [GD = (1 + 2RF / RG)] gives the equivalent input-referred spot noise voltage at the noninverting input, as shown in Equation 3.

Equation 3. THS6212

Evaluating these equations for the THS6212 circuit and component values of Figure 7-1 with RS = 50 Ω, gives a total output spot noise voltage of 53.3 nV/√Hz and a total equivalent input spot noise voltage of 6.5 nV/√Hz.

To minimize the output noise as a result of the noninverting input bias current noise, keep the noninverting source impedance as low as possible.