Achieving optimum performance with a high-frequency amplifier such as the THS6212 requires careful attention to board layout parasitic and external component types. Recommendations that optimize performance include:

1. Minimize parasitic capacitance to any ac ground for all signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability; on the noninverting input, this capacitance can react with the source impedance to cause unintentional band limiting. To reduce unwanted capacitance, a window around the signal I/O pins must be opened in all ground and power planes around these pins. Otherwise, ground and power planes must be unbroken elsewhere on the board.
2. Minimize the distance (less than 0.25 in, or 6.35 mm) from the power-supply pins to high-frequency 0.1-µF decoupling capacitors. At the device pins, the ground and power plane layout must not be in close proximity to the signal I/O pins. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. The power-supply connections must always be decoupled with these capacitors. An optional supply decoupling capacitor across the two power supplies (for bipolar operation) improves second-harmonic distortion performance. Larger (2.2 µF to 6.8 µF) decoupling capacitors, effective at lower frequencies, must also be used on the main supply pins. These capacitors can be placed somewhat farther from the device and can be shared among several devices in the same area of the PCB.
3. Careful selection and placement of external components preserve the high-frequency performance of the THS6212. Resistors must be of a very low reactance type. Surface-mount resistors work best and allow a tighter overall layout. Metal film and carbon composition, axially-leaded resistors can also provide good high-frequency performance.

   Again, keep leads and PCB trace length as short as possible. Never use wire-wound type resistors in a high-frequency application. Although the output pin and inverting input pin are the most sensitive to parasitic capacitance, always position the feedback and series output resistor, if any, as close as possible to the output pin. Other network components, such as noninverting input termination resistors, must also be placed close to the package. Where double-side component mounting is allowed, place the feedback resistor directly under the package on the other side of the board between the output and inverting input pins. The frequency response is primarily determined by the feedback resistor value as described in the Wideband Current-Feedback Operation Detailed Design Procedure section. Increasing the value reduces the bandwidth, whereas decreasing the value leads to a more peaked frequency response. The 1.24-kΩ feedback resistor used in the Typical Characteristics sections at a gain of 10 V/V on 28V supplies is a good starting point for design. Note that a 1.5-kΩ feedback resistor, rather than a direct short, is recommended for a unity-gain follower application. A current-feedback op amp requires a feedback resistor to control stability even in the unity-gain follower configuration.

4. Make connections to other wideband devices on the board with short direct traces or through onboard transmission lines. For short connections, consider the trace and the input to the next device as a lumped capacitive load. Relatively wide traces (50 mils to 100 mils [0.050 in to 0.100 in, or 1.27 mm to 2.54 mm]) must be used, preferably with ground and power planes opened up around them. Estimate the total capacitive load and set R_S from the recommended R_S versus capacitive load plots (see Figure 5-10). Low parasitic capacitive loads (less than 5 pF) do not always need an isolation resistor because the THS6212 is nominally compensated to operate with a 2-pF parasitic load. If a long trace is required, and the 6-dB signal loss intrinsic to a doubly-terminated transmission line is acceptable, implement a matched-impedance transmission line using microstrip or stripline techniques (consult an ECL design handbook for microstrip and stripline layout techniques). A 50-Ω environment is not necessary on board; in fact, a higher impedance environment improves distortion (see the distortion versus load plots). With a characteristic board trace impedance defined based on board material and trace dimensions, a matching series resistor into the trace from the output of the THS6212 is used, as well as a terminating shunt resistor at the input of the destination device. Remember also that the terminating impedance is the parallel combination of the shunt resistor and the input impedance of the destination device.

   This total effective impedance must be set to match the trace impedance. The high output voltage and current capability of the THS6212 allows multiple destination devices to be handled as separate transmission lines, each with respective series and shunt terminations. If the 6-dB attenuation of a doubly-terminated transmission line is unacceptable, a long trace can be series-terminated at the source end only.

   Treat the trace as a capacitive load in this case and set the series resistor value as shown in the recommended R_S versus capacitive load plots. However, this configuration does not preserve signal integrity as well as a doubly-terminated line. If the input impedance of the destination device is low, there is some signal attenuation as a result of the voltage divider formed by the series output into the terminating impedance.

5. Socketing a high-speed part such as the THS6212 is not recommended. The additional lead length and pin-to-pin capacitance introduced by the socket can create an extremely troublesome parasitic network, and can make achieving a smooth, stable frequency response almost impossible. Best results are obtained by soldering the THS6212 directly onto the board.
6. Solder the exposed thermal pad to a heat-spreading power or ground plane. This pad is electrically isolated from the die, but must be connected to a power or ground plane and not floated.