SBOS876B September   2017  – February 2020 TMP461-SP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Simplified Block Diagram
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Two-Wire Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Temperature Measurement Data
        1. 7.3.1.1 Standard Binary to Decimal Temperature Data Calculation Example
        2. 7.3.1.2 Standard Decimal to Binary Temperature Data Calculation Example
      2. 7.3.2 Series Resistance Cancellation
      3. 7.3.3 Differential Input Capacitance
      4. 7.3.4 Filtering
      5. 7.3.5 Sensor Fault
      6. 7.3.6 ALERT and THERM Functions
    4. 7.4 Device Functional Modes
      1. 7.4.1 Shutdown Mode (SD)
    5. 7.5 Programming
      1. 7.5.1 Serial Interface
        1. 7.5.1.1 Bus Overview
        2. 7.5.1.2 Bus Definitions
        3. 7.5.1.3 Serial Bus Address
        4. 7.5.1.4 Read and Write Operations
        5. 7.5.1.5 Timeout Function
        6. 7.5.1.6 High-Speed Mode
      2. 7.5.2 General-Call Reset
    6. 7.6 Register Map
      1. 7.6.1 Register Information
        1. 7.6.1.1  Pointer Register
        2. 7.6.1.2  Local and Remote Temperature Registers
        3. 7.6.1.3  Status Register
        4. 7.6.1.4  Configuration Register
        5. 7.6.1.5  Conversion Rate Register
        6. 7.6.1.6  One-Shot Start Register
        7. 7.6.1.7  Channel Enable Register
        8. 7.6.1.8  Consecutive ALERT Register
        9. 7.6.1.9  η-Factor Correction Register
        10. 7.6.1.10 Remote Temperature Offset Register
        11. 7.6.1.11 Manufacturer Identification Register
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Radiation Environments
      1. 8.3.1 Single Event Latch-Up
      2. 8.3.2 Single Event Functional Interrupt
      3. 8.3.3 Single Event Upset
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

7.5.1.1 Bus Overview

The TMP461-SP device is SMBus-interface-compatible. In SMBus protocol, the device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and generates the start and stop conditions.

To address a specific device, a start condition is initiated. A start condition is indicated by pulling the data line (SDA) from a high-to-low logic level when SCL is high. All slaves on the bus shift in the slave address byte, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an acknowledge bit and pulling SDA low.

Data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During data transfer, SDA must remain stable when SCL is high. A change in SDA when SCL is high is interpreted as a control signal.

After all data are transferred, the master generates a stop condition. A stop condition is indicated by pulling SDA from low to high when SCL is high.