Achieving optimum performance with a high-frequency amplifier (like the OPAx863A) requires careful attention to board layout parasitics and external component types. The High Speed Amplifiers Generic DSN Evaluation Module user's guide can be used as a reference when designing the circuit board. Recommendations that optimize performance includes the following:

1. Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on the output and inverting input pins can cause instability on the noninverting input and can react with the source impedance to cause unintentional band-limiting. Open a window around the signal I/O pins in all of the ground and power planes around those pins to reduce unwanted capacitance. Otherwise, ground and power planes must be unbroken elsewhere on the board.
2. Minimize the distance (< 0.1 in) from the power-supply pins to high-frequency 0.01‑µF decoupling capacitors. Avoid narrow power and ground traces to minimize inductance between the pins and the decoupling capacitors. Always decouple the power-supply connections these capacitors. Use larger (2.2‑µF to 6.8‑µF) decoupling capacitors, effective at lower frequency, on the supply pins. These capacitors can be placed somewhat farther from the device and shared among several devices in the same area of the PCB.
3. Carefully select and place external components to preserve the high-frequency performance of the OPAx863A. Use low-reactance-type resistors. Surface-mount resistors work best and allow a tighter overall layout. Place other network components, such as noninverting input termination resistors, close to the package. Keep resistor values as low as possible and consistent with load-driving considerations. Lower the resistor values to keep the resistor noise terms low and minimize the effect of the parasitic capacitance. Lower resistor values, however, increase the dynamic power consumption because R_F and R_G become part of the amplifier output load network.