SBOSA95F May   2022  – October 2024 OPA2863A , OPA863A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information OPA863A
    5. 6.5  Thermal Information OPA2863A
    6. 6.6  Electrical Characteristics VS = ±5 V
    7. 6.7  Electrical Characteristics VS = 3 V
    8. 6.8  Typical Characteristics: VS = ±5 V
    9. 6.9  Typical Characteristics: VS = 3 V
    10. 6.10 Typical Characteristics: VS = 3 V to 10 V
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Input Stage
      2. 7.3.2 Output Stage
        1. 7.3.2.1 Overload Power Limit
      3. 7.3.3 ESD Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Down Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Active Filters
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Low-Power SAR ADC Driver and Reference Buffer
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5 Pin Configuration and Functions

OPA863A OPA2863A OPA863A DBV Package, 5-Pin SOT-23 (Top View) Figure 5-1 OPA863A DBV Package, 5-Pin SOT-23 (Top View)
Table 5-1 Pin Functions: OPA863A
PIN TYPE DESCRIPTION
NAME NO.
VIN+ 3 Input Noninverting input pin
VIN– 4 Input Inverting input pin
VOUT 1 Output Output pin
VS– 2 Power Negative power-supply pin
VS+ 5 Power Positive power-supply pin
OPA863A OPA2863A OPA2863A D Package, 8-Pin SOIC and DGK (Preview) Package, 8-Pin VSSOP (Top View)Figure 5-2 OPA2863A D Package,
8-Pin SOIC and DGK (Preview) Package,
8-Pin VSSOP (Top View)
OPA863A OPA2863A OPA2863A DSN Package, 10-Pin USON With Exposed Thermal Pad (Top View)Figure 5-3 OPA2863A DSN Package, 10-Pin USON With Exposed Thermal Pad (Top View)
Table 5-2 Pin Functions: OPA2863A
PIN TYPE DESCRIPTION
NAME NO.
D (SOIC),
DGK (VSSOP)		 DSN (USON)
PD1 — 5 Input Amplifier 1 power down.
Low = disabled, high = enabled
PD2 — 6 Input Amplifier 2 power down.
Low = disabled, high = enabled
VIN1– 2 2 Input Amplifier 1 inverting input pin
VIN1+ 3 3 Input Amplifier 1 noninverting input pin
VIN2– 6 8 Input Amplifier 2 inverting input pin
VIN2+ 5 7 Input Amplifier 2 noninverting input pin
VOUT1 1 1 Output Amplifier 1 output pin
VOUT2 7 9 Output Amplifier 2 output pin
VS– 4 4 Power Negative power-supply pin
VS+ 8 10 Power Positive power-supply pin
Thermal pad — Thermal pad — Thermal pad. Electrically isolated from the device. Connect to a heat-spreading plane, typically ground.