SBOSAI0B December   2023  – September 2024 OPA310-Q1

PRODMIX  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information for Single Channel
    5. 5.5 Thermal Information for Dual Channel
    6. 5.6 Thermal Information for Quad Channel
    7. 5.7 Electrical Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Operating Voltage
      2. 6.3.2 Rail-to-Rail Input
      3. 6.3.3 Rail-to-Rail Output
      4. 6.3.4 Capacitive Load and Stability
      5. 6.3.5 Overload Recovery
      6. 6.3.6 EMI Rejection
      7. 6.3.7 ESD and Electrical Overstress
      8. 6.3.8 Input ESD Protection
      9. 6.3.9 Shutdown Function
    4. 6.4 Device Functional Modes
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 OPAx310-Q1 Low-Side, Current Sensing Application
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4.     Trademarks
    5. 8.4 Electrostatic Discharge Caution
    6. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Thermal Information for Dual Channel

THERMAL METRIC (1) OPA2310-Q1

(SOIC)
DGK 
(VSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 139.0 187.7
RθJC(top) Junction-to-case (top) thermal resistance 81.2 78.1
RθJB Junction-to-board thermal resistance 82.4 109.5
ψJT Junction-to-top characterization parameter 31.3 17.9
ψJB Junction-to-board characterization parameter 81.6 107.9
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A N/A
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.