SBOSAI7B
November 2023 – July 2024
OPA2891
,
OPA891
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information - OPA891
5.5
Thermal Information - OPA2891
5.6
Electrical Characteristics - RL = 150Ω
5.7
Electrical Characteristics - RL = 1kΩ
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Offset Nulling
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Driving a Capacitive Load
7.1.2
Low-Pass Filter Configurations
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Selection of Multiplexer
7.2.2.2
Signal Source
7.2.2.3
Driving Amplifier
7.2.2.4
Driving Amplifier Bandwidth Restriction
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.1.1
General PowerPAD™ Integrated Circuit Package Design Considerations
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
1
Features
Ultra-low 0.95nV/√Hz voltage noise
High speed:
180MHz unity gain bandwidth
140MHz bandwidth at a gain of 2V/V (–1V/V)
105V/μs slew rate
Very low distortion
THD = –91dBc (f = 1MHz, R
L
= 150Ω)
THD = –100dBc (f = 1MHz, R
L
= 1kΩ)
THD+N = –137dBc (f = 1kHz, BW = 80kHz)
Low 0.2mV (typical) and 1mV (maximum) input offset voltage at 25°C
200mA output current drive (typical)
Typical operation from ±4.5V to ±18V
Offset nulling pins on the
OPA891