SBOU024C
august 2004 – july 2023
PGA309
1
Read This First
About This Manual
Related Documentation from Texas Instruments
If You Need Assistance
Information About Cautions and Warnings
FCC Warning
Trademarks
1
Introduction
1.1
PGA309 Functional Description
1.2
Sensor Error Adjustment Range
1.3
Gain Scaling
1.4
Offset Adjustment
1.5
Voltage Reference
1.6
Sensor Excitation and Linearization
1.7
ADC for Temperature Sensing
1.8
External EEPROM and Temperature Coefficients
1.9
Fault Monitor
1.10
Over-Scale and Under-Scale Limits
1.11
Power-Up and Normal Operation
1.12
Digital Interface
1.13
Pin Configuration
2
Detailed Description
2.1
Gain Scaling
2.1.1
PGA309 Transfer Function
2.1.2
Solving For Gain Settings
2.2
Offset Scaling
2.3
Zero DAC and Gain DAC Architecture
2.4
Output Amplifier
2.5
Reference Voltage
2.6
Linearization Function
2.6.1
System Definitions
2.6.2
Key Linearization Design Equations
2.6.2.1
Lin DAC Counts Conversion
2.6.3
Key Ideal Design Equations
2.6.3.1
Linearization Design
37
2.7
Temperature Measurement
2.7.1
Temp ADC Start-Convert Control
2.7.2
External Temperature Sensing with an Excitation Series Resistor
2.8
Fault Monitor
2.9
Over-Scale and Under-Scale
2.9.1
Over-Scale and Under-Scale Calculation
44
2.10
Noise and Coarse Offset Adjust
2.11
General AC Considerations
3
Operating Modes
3.1
Power-On Sequence and Normal Stand-Alone Operation
3.2
EEPROM Content and Temperature Lookup Table Calculation
3.2.1
Temperature Lookup Table Calculation
3.2.1.1
Temperature Lookup Table Calculation
52
53
3.3
Checksum Error Event
3.4
Test Pin
3.5
Power-On Initial Register States
3.5.1
PGA309 Power-Up State
4
Digital Interface
4.1
Description
4.2
Two-Wire Interface
4.2.1
Device Addressing
4.2.2
Two-Wire Access to PGA309
4.3
One-Wire Interface
4.4
One-Wire Interface Timeout
4.5
One-Wire Interface Timing Considerations
4.6
Two-Wire Access to External EEPROM
4.7
One-Wire Interface Initiated Two-Wire EEPROM Transactions
4.8
PGA309 Stand-Alone Mode and Two-Wire Transactions
4.9
PGA309 Two-Wire Bus Master Operation and Bus Sharing Considerations
4.10
One-Wire Operation with PRG Connected to VOUT
4.11
Four-Wire Modules and One-Wire Interface (PRG)
5
Application Background
5.1
Bridge Sensors
5.2
System Scaling Options for Bridge Sensors
5.2.1
Absolute Scale
5.2.2
Ratiometric Scale
5.3
Trimming Real World Bridge Sensors for Linearity
5.4
PGA309 Calibration Procedure
6
Register Descriptions
6.1
Internal Register Overview
6.2
Internal Register Map
6.2.1
Register 0: Temp ADC Output Register (Read Only, Address Pointer = 00000)
6.2.2
Register 1: Fine Offset Adjust (Zero DAC) Register (Read/Write, Address Pointer = 00001)
6.2.3
Register 2: Fine Gain Adjust (Gain DAC) Register (Read/Write, Address Pointer = 00010)
6.2.4
Register 3: Reference Control and Linearization Register (Read/Write, Address Pointer = 00011)
6.2.5
Register 4: PGA Coarse Offset Adjust and Gain Select/Output Amplifier Gain Select Register (Read/Write, Address Pointer = 00100)
6.2.6
Register 5: PGA Configuration and Over/Under-Scale Limit Register (Read/Write, Address Pointer = 00101)
6.2.7
Register 6: Temp ADC Control Register (Read/Write, Address Pointer = 00110)
6.2.8
Register 7: Output Enable Counter Control Register (Read/Write, Address Pointer = 00111)
6.2.9
Register 8: Alarm Status Register (Read Only, Address Pointer = 01000)
A External EEPROM Example
A.1 PGA309 External EEPROM Example
A.1.1 Gain and Offset Scaling for External EEPROM
94
B Detailed Block Diagram
B.1 Detailed Block Diagram
C Glossary
Revision History
4
Digital Interface
This chapter describes the digital interface of the PGA309.