SBOU268 November 2021 OPA593
The OPA593 VOUT output can be monitored at the J11 BNC jack, J12 terminal block jack, or TP14 test point. A convenient ground point, TP15, is located near TP14. The EVM includes a 1-kΩ, 2-W, surface-mount, wire-wound resistor (RL) that is connected into the circuit by JP21. PCB footprints for a load capacitor (CL) and an RC snubber network (Rz, Cz) are included, but are not populated for most uses. These unpopulated components may be populated using user-supplied components.
If the load power exceeds 2 W, make sure the load is not directly attached to the OPA593EVM PC board. Instead, connect the load to the VOUT J12 terminal block using wires.
Very-fast rectifier diodes D3 and D4 are included from the OPA593 output pin to each supply rail. The diodes protect the OPA593 output stage from potential back EMF damage sometimes created by an inductive load at VOUT.