SBVA089A September   2020  – October 2023 TPS745-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Failure Mode Distribution (FMD)

The failure mode distribution estimation for TPS745-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.

The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.

Table 3-1 Die Failure Modes and Distribution
Die Failure Modes Failure Mode Distribution (%)
VOUT High (Following VIN) 15%
VOUT Not in Specification - Voltage or Timing 60%
VOUT Low (No Output) 15%
PG False Trigger, Fails to Trigger 5%
Short Circuit Any Two Pins 5%