SBVA089A September   2020  – October 2023 TPS745-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)
  7. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS745-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TPS745-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS745-Q1 data sheet.

GUID-20200807-CA0I-C3T2-4CNG-FJL29MSG11M9-low.gifFigure 4-1 Pin Diagram Adjustable TPS745-Q1 DRV Package
Figure 4-2 Pin Diagram Fixed TPS745-Q1 DRV Package
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1Output voltage will be near or at ground - Device will enter current limit. Device may cycle in and out of thermal shutdown depending on power dissipation.B
FB/NC2[Adjustable Output] Device will stop regulating. VOUT becomes equal to VIN minus dropout because the pass fet is driven on as hard as possible.
[Fixed Output] No effect.
B/D
GND3-D
EN4Device will turn off.B
PG5Power-good never asserts when the output voltage is at target, thus potentially effecting power sequencing.B
IN6No output voltage. Input supply can be 0 V.B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
OUT 1 Output voltage is disconnected from load B
FB/NC 2 [Adjustable Output] Error amplifier input is left floating, output voltage will not equal to set voltage
[Fixed Output] No effect
B/D
GND 3 Device may disable B
EN 4 Device may disable B
PG 5 The power-good signal is not accessible. Power sequencing can be effected. B
IN 6 No output voltage B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Short with

Pin No.

Description of Potential Failure Effect(s)Failure Effect Class
OUT1FB/NC2\[Adjustable Ouput] VOUT will be set to VFB = 0.55 V

[Fixed Output] No effect

B/D
FB/NC2GND3[Adjustable Ouput] Device will stop regulating. Vout becomes equal to VIN minus dropout becasue the pass fet is driven on as hard as possible
[Fixed Output] No effect
B/D
GND3EN4Output is forced OFF, VOUT is 0.0 VB
EN4PG5[Push-pull power good] Output voltage connected to the input voltage through the internal PG MOSFET body diode. Output voltage is increased.
[Open drain power good] Power-good never asserts when the output voltage is at target, thus potentially effecting power sequencing
A/B
PG5IN6[Push-pull power good] Output voltage connected to the input voltage through the internal PG MOSFET body diode. Output voltage is increased.
[Open drain power good] Power-good never asserts when the output voltage is at target, thus potentially effecting power sequencing
A/B
Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN Supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT

1

Output is not Regulated. VOUT = VIN

B

FB/NC

2

[Adjustable Output] FB pin will be damaged if Vin is higher than 2V

[Fixed Output] No effect

A/D

GND

3

No Output Voltage. Either input supply is at 0.0V, or input fuse is blown

B

EN

4

Output is forced ON regardless of enable signal

B

PG

5

[push-pull power good] Output voltage connected to the input voltage through the internal PG MOSFET body diode. Output voltage is increased.

[open drain power good] Power-good functionality cannot operate correctly. PG can be damaged if the absolute maximum rating (6.5 V) is violated.

A/B

IN

6

No Effect

D

GUID-FB1E55C5-36A7-43BA-8E39-45DFB1120700-low.svgFigure 4-3 Pin Diagram Adjustable TPS745-Q1 DRB Package
GUID-374A762D-9A72-436F-9662-ADDFC65DD6F9-low.svgFigure 4-4 Pin Diagram Fixed TPS745-Q1 DRB Package
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1Output voltage will be near/at ground - Device will enter current limit. It may cycle in and out of thermal shutdown depending on power dissipationB
NC2Improved Thermal PerformanceD
FB/NC3[Adjustable Output] Device will stop regulating. VOUT becomes equal to VIN minus dropout because the pass fet is driven on as hard as possible.
[Fixed Output] No effect.
B/D
GND4-D
EN5Device will turn off.B
PG6Power-good never asserts when the output voltage is at target, thus potentially effecting power sequencing.B
NC7Improved Thermal PerformanceD
IN8No output voltage.B
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1Output voltage is disconnected from load.B
NC2No EffectD
FB/NC3[Adjustable Output] Error aplifier input is left floating, output voltage will not equal to set voltage.
[Fixed Output] No effect.
B/D
GND4Device may disable.B
EN5Device may disable.B
PG6The power-good signal is not accessible. Power sequencing can be effected.B
NC2No EffectD
IN8No output voltageB
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Short withPin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1NC2Reduced thermal performanceD
NC2FB/NC3No EffectD
FB/NC3GND4[Adjustable Ouput] Device will stop regulating. Vout becomes equal to VIN minus dropout becasue the pass fet is always on

[Fixed Output] No effect

B/D
GND4EN5Output is forced OFF, VOUT is 0.0VB
EN5PG6[Push-pull power good] Output voltage connected to the input voltage through the internal PG MOSFET body diode. Output voltage is increased.
[Open drain power good] Power-good never asserts when the output voltage is at target, thus potentially effecting power sequencing
A/B
PG6NC7No EffectD
NC7IN8Reduced thermal performanceD
Table 4-9 Pin FMA for Device Pins Short-Circuited to VIN Supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
OUT1Output is not Regulated. VOUT = VINB
NC2No EffectD
FB/NC3[Adjustable Output] FB pin will be damaged if Vin is higher than 2 V

[Fixed Output] No effect

A/D
GND4No Output Voltage. Either input supply is at 0.0 V, or input fuse is blownB
EN5Output is forced ON regardless of enable signalB
PG6[push-pull power good] Output voltage connected to the input voltage through the internal PG MOSFET body diode. Output voltage is increased.
[open drain power good] Power-good functionality cannot operate correctly. PG can be damaged if the absolute maximum rating (6.5 V) is violated.
A/B
NC7No EffectD
IN8No EffectD