Figure 1-1 shows how internal circuitry is connected and its functional blocks. Generally, NMOSFET pass transistor has low impedance at output stage. Hence it can provide low noise performance since NMOS LDO has a low spike/ripple at output which is dependent on output impedance. Unit gain Opamp named as EA (error amplifier) monitors output voltage directly via SENSE pin and its reference_Vref at non-inverting input comes from the additional Op amp loop. It has a dedicated gain to make Vref follow desired Vout in 25-mV steps and it can be trimmed through OTP process adjusting RB of its resistor network. Bandgap 1.2 V is supplied from external biasing accommodating ultra low dropout at low output voltages. Section 1.2 will address the reason why NMOS LDO needs external biasing.